/external/vixl/test/aarch32/ |
D | test-assembler-aarch32.cc | 1730 __ Ldrsb(r2, &lit); in TEST() local 1815 __ Ldrsb(r6, &l5); in TEST() local 1871 __ Ldrsb(eq, r6, &l5); in TEST() local 1872 __ Ldrsb(ne, r6, &l5_not_taken); in TEST() local 1909 {&MacroAssembler::Ldrsb, r5, 255, 4095, 0x00000087, 0xffffff87}}; 2125 __ Ldrsb(r6, &l5); in TEST() local 2151 __ Ldrsb(lr, &l5); in TEST() local 4051 __ Ldrsb(r3, literal); in TEST_T32() local 4123 __ Ldrsb(r3, literal); in TEST_T32() local 4217 __ Ldrsb(r3, literal); in TEST_T32() local [all …]
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D | test-disasm-a32.cc | 3419 COMPARE_T32(Ldrsb(eq, r5, MemOperand(r6, r7)), in TEST() 3423 COMPARE_T32(Ldrsb(eq, r6, MemOperand(r9)), in TEST() 4260 COMPARE_BOTH(Ldrsb(r0, MemOperand(pc, minus, 0)), "ldrsb r0, [pc, #-0]\n"); in TEST()
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D | test-simulator-cond-rd-memop-immediate-512-a32.cc | 118 M(Ldrsb) \
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D | test-simulator-cond-rd-memop-rs-a32.cc | 119 M(Ldrsb) \
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/external/vixl/src/aarch32/ |
D | macro-assembler-aarch32.h | 665 void Ldrsb(Condition cond, Register rt, RawLiteral* literal) { in Ldrsb() function 684 void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); } in Ldrsb() function 2218 void Ldrsb(Condition cond, Register rt, const MemOperand& operand) { in Ldrsb() function 2233 void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); } in Ldrsb() function
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/external/vixl/test/aarch64/ |
D | test-assembler-aarch64.cc | 3121 __ Ldrsb(w0, MemOperand(x24)); in TEST() local 3122 __ Ldrsb(w1, MemOperand(x24, 4)); in TEST() local 3125 __ Ldrsb(x4, MemOperand(x24)); in TEST() local 3126 __ Ldrsb(x5, MemOperand(x24, 4)); in TEST() local
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D | test-assembler-sve-aarch64.cc | 8799 masm->Ldrsb(dst, MemOperand(addr)); in ScalarLoadHelper()
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/external/vixl/src/aarch64/ |
D | macro-assembler-aarch64.h | 51 V(Ldrsb, Register&, rt, rt.Is64Bits() ? LDRSB_x : LDRSB_w) \
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