Searched refs:LoadStoreOp (Results 1 – 14 of 14) sorted by relevance
/external/vixl/src/aarch64/ |
D | instructions-aarch64.cc | 553 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsLoad() 585 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsStore() 840 unsigned CalcLSDataSize(LoadStoreOp op) { in CalcLSDataSize()
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D | instructions-aarch64.h | 164 unsigned CalcLSDataSize(LoadStoreOp op); 394 return CalcLSDataSize(static_cast<LoadStoreOp>(Mask(LoadStoreMask))); in GetSizeLS()
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D | assembler-aarch64.h | 6554 LoadStoreOp op, 6810 static LoadStoreOp LoadOpFor(const CPURegister& rt); 6813 static LoadStoreOp StoreOpFor(const CPURegister& rt);
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D | assembler-aarch64.cc | 5713 LoadStoreOp op, in LoadStore() 6080 LoadStoreOp Assembler::LoadOpFor(const CPURegister& rt) { in LoadOpFor() 6103 LoadStoreOp Assembler::StoreOpFor(const CPURegister& rt) { in StoreOpFor()
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D | macro-assembler-aarch64.cc | 1948 LoadStoreOp op) { in LS_MACRO_LIST()
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D | constants-aarch64.h | 1127 enum LoadStoreOp { enum
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D | simulator-aarch64.cc | 2151 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreMask)); in LoadStoreHelper()
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D | macro-assembler-aarch64.h | 854 LoadStoreOp op);
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIRegisterInfo.cpp | 719 int LoadStoreOp = IsStore ? in buildMUBUFOffsetLoadStore() local 721 if (LoadStoreOp == -1) in buildMUBUFOffsetLoadStore() 729 BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp)) in buildMUBUFOffsetLoadStore() 749 unsigned LoadStoreOp, in buildSpillLoadStore() argument 763 const MCInstrDesc *Desc = &TII->get(LoadStoreOp); in buildSpillLoadStore() 766 bool IsFlat = TII->isFLATScratch(LoadStoreOp); in buildSpillLoadStore() 833 assert(AMDGPU::getNamedOperandIdx(LoadStoreOp, AMDGPU::OpName::vaddr) < 0 in buildSpillLoadStore() 837 LoadStoreOp = AMDGPU::getFlatScratchInstSTfromSS(LoadStoreOp); in buildSpillLoadStore() 838 Desc = &TII->get(LoadStoreOp); in buildSpillLoadStore()
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D | SIRegisterInfo.h | 337 unsigned LoadStoreOp,
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/external/llvm/lib/Target/AMDGPU/ |
D | SIRegisterInfo.h | 197 unsigned LoadStoreOp, const MachineOperand *SrcDst,
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D | SIRegisterInfo.cpp | 411 unsigned LoadStoreOp, in buildScratchLoadStore() argument 476 BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp)) in buildScratchLoadStore()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIRegisterInfo.h | 295 unsigned LoadStoreOp,
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D | SIRegisterInfo.cpp | 585 int LoadStoreOp = IsStore ? in buildMUBUFOffsetLoadStore() local 587 if (LoadStoreOp == -1) in buildMUBUFOffsetLoadStore() 595 BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp)) in buildMUBUFOffsetLoadStore() 615 unsigned LoadStoreOp, in buildSpillLoadStore() argument 629 const MCInstrDesc &Desc = TII->get(LoadStoreOp); in buildSpillLoadStore()
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