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Searched refs:LoopOp (Results 1 – 18 of 18) sorted by relevance

/external/llvm-project/mlir/lib/Dialect/OpenACC/IR/
DOpenACC.cpp153 return isa<acc::ParallelOp>(op) || isa<acc::LoopOp>(op); in isComputeOperation()
473 if (succeeded(parser.parseOptionalKeyword(LoopOp::getGangKeyword()))) in parseLoopOp()
479 parser, result, LoopOp::getGangNumKeyword()); in parseLoopOp()
484 parser, result, LoopOp::getGangStaticKeyword()); in parseLoopOp()
493 if (succeeded(parser.parseOptionalKeyword(LoopOp::getWorkerKeyword()))) in parseLoopOp()
502 if (succeeded(parser.parseOptionalKeyword(LoopOp::getVectorKeyword()))) in parseLoopOp()
511 if (failed(parseOperandList(parser, LoopOp::getTileKeyword(), tileOperands, in parseLoopOp()
516 if (failed(parseOperandList(parser, LoopOp::getPrivateKeyword(), in parseLoopOp()
521 if (failed(parseOperandList(parser, LoopOp::getReductionKeyword(), in parseLoopOp()
526 result.addAttribute(LoopOp::getExecutionMappingAttrName(), in parseLoopOp()
[all …]
/external/llvm-project/flang/include/flang/Optimizer/Dialect/
DFIROps.h21 class LoopOp; variable
32 LoopOp getForInductionVarOwner(mlir::Value val);
DFIROps.td1855 ParentOneOf<["WhereOp", "LoopOp", "IterWhileOp"]>]> {
2023 to `fir::LoopOp` with the addition that it requires a single loop-carried
/external/llvm-project/flang/lib/Optimizer/Dialect/
DFIROps.cpp788 void fir::LoopOp::build(mlir::OpBuilder &builder, mlir::OperationState &result, in build()
799 LoopOp::ensureTerminator(*bodyRegion, builder, result.location); in build()
826 result.addAttribute(fir::LoopOp::unorderedAttrName(), in parseLoopOp()
863 fir::LoopOp::ensureTerminator(*body, builder, result.location); in parseLoopOp()
868 fir::LoopOp fir::getForInductionVarOwner(mlir::Value val) { in getForInductionVarOwner()
874 return dyn_cast_or_null<fir::LoopOp>(containingInst); in getForInductionVarOwner()
878 static mlir::LogicalResult verify(fir::LoopOp op) { in verify()
917 static void print(mlir::OpAsmPrinter &p, fir::LoopOp op) { in print()
919 p << fir::LoopOp::getOperationName() << ' ' << op.getInductionVar() << " = " in print()
934 {fir::LoopOp::unorderedAttrName()}); in print()
[all …]
/external/llvm-project/flang/lib/Lower/
DDoLoopHelper.cpp22 auto loop = builder.create<fir::LoopOp>(loc, lbi, ubi, inc); in createLoop()
DOpenACC.cpp231 auto loopOp = createRegionOp<mlir::acc::LoopOp, mlir::acc::YieldOp>( in genACC()
234 loopOp.setAttr(mlir::acc::LoopOp::getExecutionMappingAttrName(), in genACC()
244 loopOp.setAttr(mlir::acc::LoopOp::getCollapseAttrName(), in genACC()
248 loopOp.setAttr(mlir::acc::LoopOp::getSeqAttrName(), in genACC()
252 loopOp.setAttr(mlir::acc::LoopOp::getIndependentAttrName(), in genACC()
255 loopOp.setAttr(mlir::acc::LoopOp::getAutoAttrName(), in genACC()
DIO.cpp390 builder.create<fir::LoopOp>(loc, lowerValue, upperValue, stepValue); in genIoLoop()
/external/llvm-project/mlir/lib/Conversion/SCFToSPIRV/
DSCFToSPIRV.cpp134 auto loopOp = rewriter.create<spirv::LoopOp>(loc, loopControl); in matchAndRewrite()
276 if (isa<spirv::LoopOp>(terminatorOp->getParentOp())) { in matchAndRewrite()
/external/icu/icu4c/source/i18n/
Dregexcmp.h104 int32_t LoopOp);
Dregexcmp.cpp2456 void RegexCompile::compileInterval(int32_t InitOp, int32_t LoopOp) in compileInterval() argument
2490 appendOp(LoopOp, topOfBlock); in compileInterval()
/external/icu/libicu/cts_headers/
Dregexcmp.h104 int32_t LoopOp);
/external/llvm-project/mlir/lib/Dialect/SPIRV/
DSPIRVOps.cpp2250 void spirv::LoopOp::build(OpBuilder &builder, OperationState &state) { in build()
2264 static void print(spirv::LoopOp loopOp, OpAsmPrinter &printer) { in print()
2267 printer << spirv::LoopOp::getOperationName(); in print()
2286 static LogicalResult verify(spirv::LoopOp loopOp) { in verify()
2371 Block *spirv::LoopOp::getEntryBlock() { in getEntryBlock()
2376 Block *spirv::LoopOp::getHeaderBlock() { in getHeaderBlock()
2382 Block *spirv::LoopOp::getContinueBlock() { in getContinueBlock()
2388 Block *spirv::LoopOp::getMergeBlock() { in getMergeBlock()
2394 void spirv::LoopOp::addEntryAndMergeBlock() { in addEntryAndMergeBlock()
2411 if (!parentOp || !isa<spirv::SelectionOp, spirv::LoopOp>(parentOp)) in verify()
DSPIRVDialect.cpp72 return isa<spirv::FuncOp, spirv::SelectionOp, spirv::LoopOp>(op); in isLegalToInline()
81 if ((isa<spirv::SelectionOp, spirv::LoopOp>(op)) && in isLegalToInline()
/external/llvm-project/mlir/lib/Dialect/SPIRV/Serialization/
DSerializer.cpp85 if (auto loopOp = dyn_cast<spirv::LoopOp>(op)) in getStructuredControlFlowOpMergeBlock()
97 if (auto loopOp = dyn_cast<spirv::LoopOp>(block->getParentOp())) { in getPhiIncomingBlock()
343 LogicalResult processLoopOp(spirv::LoopOp loopOp);
1757 LogicalResult Serializer::processLoopOp(spirv::LoopOp loopOp) { in processLoopOp()
1916 .Case([&](spirv::LoopOp op) { return processLoopOp(op); }) in processOperation()
DDeserializer.cpp1958 spirv::LoopOp createLoopOp(uint32_t loopControl);
1991 spirv::LoopOp ControlFlowStructurizer::createLoopOp(uint32_t loopControl) { in createLoopOp()
1997 auto loopOp = builder.create<spirv::LoopOp>(location, control); in createLoopOp()
/external/llvm-project/mlir/lib/Conversion/SPIRVToLLVM/
DConvertSPIRVToLLVM.cpp1037 class LoopPattern : public SPIRVToLLVMConversion<spirv::LoopOp> {
1039 using SPIRVToLLVMConversion<spirv::LoopOp>::SPIRVToLLVMConversion;
1042 matchAndRewrite(spirv::LoopOp loopOp, ArrayRef<Value> operands, in matchAndRewrite()
/external/llvm-project/mlir/include/mlir/Dialect/OpenACC/
DOpenACCOps.td382 ParentOneOf<["ParallelOp, LoopOp"]>]> {
/external/llvm-project/mlir/include/mlir/Dialect/SCF/
DSCFOps.td196 /// induction variable. LoopOp only has one region, so 0 is the only valid