| /external/llvm-project/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 133 namespace MCID {
242 bool isPreISelOpcode() const { return Flags & (1ULL << MCID::PreISelOpcode); } in isPreISelOpcode()
248 bool isVariadic() const { return Flags & (1ULL << MCID::Variadic); } in isVariadic()
252 bool hasOptionalDef() const { return Flags & (1ULL << MCID::HasOptionalDef); } in hasOptionalDef()
256 bool isPseudo() const { return Flags & (1ULL << MCID::Pseudo); } in isPseudo()
259 bool isReturn() const { return Flags & (1ULL << MCID::Return); } in isReturn()
262 bool isAdd() const { return Flags & (1ULL << MCID::Add); } in isAdd()
265 bool isTrap() const { return Flags & (1ULL << MCID::Trap); } in isTrap()
268 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg()
271 bool isCall() const { return Flags & (1ULL << MCID::Call); } in isCall()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 134 namespace MCID {
257 bool isPreISelOpcode() const { return Flags & (1ULL << MCID::PreISelOpcode); } in isPreISelOpcode()
263 bool isVariadic() const { return Flags & (1ULL << MCID::Variadic); } in isVariadic()
267 bool hasOptionalDef() const { return Flags & (1ULL << MCID::HasOptionalDef); } in hasOptionalDef()
271 bool isPseudo() const { return Flags & (1ULL << MCID::Pseudo); } in isPseudo()
274 bool isReturn() const { return Flags & (1ULL << MCID::Return); } in isReturn()
277 bool isAdd() const { return Flags & (1ULL << MCID::Add); } in isAdd()
280 bool isTrap() const { return Flags & (1ULL << MCID::Trap); } in isTrap()
283 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg()
286 bool isCall() const { return Flags & (1ULL << MCID::Call); } in isCall()
[all …]
|
| /external/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 92 namespace MCID {
200 bool isVariadic() const { return Flags & (1 << MCID::Variadic); } in isVariadic()
204 bool hasOptionalDef() const { return Flags & (1 << MCID::HasOptionalDef); } in hasOptionalDef()
208 bool isPseudo() const { return Flags & (1 << MCID::Pseudo); } in isPseudo()
211 bool isReturn() const { return Flags & (1 << MCID::Return); } in isReturn()
214 bool isCall() const { return Flags & (1 << MCID::Call); } in isCall()
219 bool isBarrier() const { return Flags & (1 << MCID::Barrier); } in isBarrier()
227 bool isTerminator() const { return Flags & (1 << MCID::Terminator); } in isTerminator()
233 bool isBranch() const { return Flags & (1 << MCID::Branch); } in isBranch()
237 bool isIndirectBranch() const { return Flags & (1 << MCID::IndirectBranch); } in isIndirectBranch()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenInstrInfo.inc | 5846 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
5847 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
5848 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
5849 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
5850 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
5851 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
5852 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
5853 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
5854 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
5855 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenInstrInfo.inc | 4861 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
4862 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
4863 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
4864 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
4865 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
4866 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
4867 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
4868 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
4869 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
4870 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenInstrInfo.inc | 2984 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
2985 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
2986 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
2987 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
2988 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
2989 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
2990 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
2991 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
2992 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
2993 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenInstrInfo.inc | 17700 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
17701 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
17702 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
17703 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
17704 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
17705 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
17706 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
17707 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
17708 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
17709 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 243 const MCInstrDesc &MCID) { in BuildMI() argument
244 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); in BuildMI()
250 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI() argument
251 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) in BuildMI()
260 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
263 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
276 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
279 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
285 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
290 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI()
[all …]
|
| D | MachineInstr.h | 78 const MCInstrDesc *MCID; // Instruction descriptor.
133 MachineInstr(MachineFunction &, const MCInstrDesc &MCID, DebugLoc dl,
283 const MCInstrDesc &getDesc() const { return *MCID; }
286 unsigned getOpcode() const { return MCID->Opcode; }
418 return hasProperty(MCID::Variadic, Type);
424 return hasProperty(MCID::HasOptionalDef, Type);
430 return hasProperty(MCID::Pseudo, Type);
434 return hasProperty(MCID::Return, Type);
438 return hasProperty(MCID::Call, Type);
445 return hasProperty(MCID::Barrier, Type);
[all …]
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 31 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore() local
32 if (!MCID) in isLoadAfterStore()
35 if (!MCID->mayLoad()) in isLoadAfterStore()
57 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet() local
58 if (!MCID) in isBCTRAfterSet()
61 if (!MCID->isBranch()) in isBCTRAfterSet()
87 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst() argument
92 unsigned IIC = MCID->getSchedClass(); in mustComeFirst()
125 if (NSlots == 1 && PPC::getNonRecordFormOpcode(MCID->getOpcode()) != -1) in mustComeFirst()
149 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother() local
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 29 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore() local
30 if (!MCID) in isLoadAfterStore()
33 if (!MCID->mayLoad()) in isLoadAfterStore()
55 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet() local
56 if (!MCID) in isBCTRAfterSet()
59 if (!MCID->isBranch()) in isBCTRAfterSet()
85 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst() argument
90 unsigned IIC = MCID->getSchedClass(); in mustComeFirst()
123 if (NSlots == 1 && PPC::getNonRecordFormOpcode(MCID->getOpcode()) != -1) in mustComeFirst()
147 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother() local
[all …]
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 29 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore() local
30 if (!MCID) in isLoadAfterStore()
33 if (!MCID->mayLoad()) in isLoadAfterStore()
55 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet() local
56 if (!MCID) in isBCTRAfterSet()
59 if (!MCID->isBranch()) in isBCTRAfterSet()
85 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst() argument
90 unsigned IIC = MCID->getSchedClass(); in mustComeFirst()
123 if (NSlots == 1 && PPC::getNonRecordFormOpcode(MCID->getOpcode()) != -1) in mustComeFirst()
147 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother() local
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenInstrInfo.inc | 6899 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
6900 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
6901 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
6902 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
6903 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
6904 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
6905 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
6906 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
6907 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
6908 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 327 const MCInstrDesc &MCID) { in BuildMI() argument
328 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); in BuildMI()
334 const MCInstrDesc &MCID, Register DestReg) { in BuildMI() argument
335 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) in BuildMI()
344 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
347 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
360 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
363 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
369 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
374 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI()
[all …]
|
| D | MachineInstr.h | 114 const MCInstrDesc *MCID; // Instruction descriptor.
472 const MCInstrDesc &getDesc() const { return *MCID; }
475 unsigned getOpcode() const { return MCID->Opcode; }
528 return getNumExplicitDefs() + MCID->getNumImplicitDefs();
746 return hasProperty(MCID::PreISelOpcode, Type);
754 return hasProperty(MCID::Variadic, Type);
760 return hasProperty(MCID::HasOptionalDef, Type);
766 return hasProperty(MCID::Pseudo, Type);
770 return hasProperty(MCID::Return, Type);
776 return hasProperty(MCID::EHScopeReturn, Type);
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 317 const MCInstrDesc &MCID) { in BuildMI() argument
318 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); in BuildMI()
324 const MCInstrDesc &MCID, Register DestReg) { in BuildMI() argument
325 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) in BuildMI()
334 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
337 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
350 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
353 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
359 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
364 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI()
[all …]
|
| D | MachineInstr.h | 112 const MCInstrDesc *MCID; // Instruction descriptor.
423 const MCInstrDesc &getDesc() const { return *MCID; }
426 unsigned getOpcode() const { return MCID->Opcode; }
442 return getNumExplicitDefs() + MCID->getNumImplicitDefs();
649 return hasProperty(MCID::PreISelOpcode, Type);
657 return hasProperty(MCID::Variadic, Type);
663 return hasProperty(MCID::HasOptionalDef, Type);
669 return hasProperty(MCID::Pseudo, Type);
673 return hasProperty(MCID::Return, Type);
679 return hasProperty(MCID::EHScopeReturn, Type);
[all …]
|
| /external/llvm-project/llvm/unittests/CodeGen/ |
| D | MachineInstrTest.cpp | 52 MCInstrDesc MCID = { in TEST() local
53 0, NumOps, NumDefs, 0, 0, 1ULL << MCID::HasOptionalDef, in TEST()
61 auto MI1 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST()
65 auto MI2 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST()
81 auto MI3 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST()
85 auto MI4 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST()
123 MCInstrDesc MCID = { in TEST() local
124 0, NumOps, NumDefs, 0, 0, 1ULL << MCID::HasOptionalDef, in TEST()
136 auto VD1VU = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST()
142 auto VD2VU = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST()
[all …]
|
| /external/llvm-project/llvm/lib/MCA/ |
| D | CodeEmitter.cpp | 19 CodeEmitter::getOrCreateEncodingInfo(unsigned MCID) { in getOrCreateEncodingInfo() argument
20 EncodingInfo &EI = Encodings[MCID]; in getOrCreateEncodingInfo()
25 const MCInst &Inst = Sequence[MCID]; in getOrCreateEncodingInfo()
26 MCInst Relaxed(Sequence[MCID]); in getOrCreateEncodingInfo()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/ |
| D | CodeEmitter.cpp | 19 CodeEmitter::getOrCreateEncodingInfo(unsigned MCID) { in getOrCreateEncodingInfo() argument
20 EncodingInfo &EI = Encodings[MCID]; in getOrCreateEncodingInfo()
25 const MCInst &Inst = Sequence[MCID]; in getOrCreateEncodingInfo()
26 MCInst Relaxed(Sequence[MCID]); in getOrCreateEncodingInfo()
|
| /external/llvm-project/llvm/lib/Transforms/Utils/ |
| D | ValueMapper.cpp | 85 unsigned MCID : 29; member
158 unsigned MCID);
162 unsigned MCID);
164 unsigned MCID);
165 void scheduleRemapFunction(Function &F, unsigned MCID);
814 CurrentMCID = E.MCID; in flush()
992 unsigned MCID) { in scheduleMapGlobalInitializer() argument
994 assert(MCID < MCs.size() && "Invalid mapping context"); in scheduleMapGlobalInitializer()
998 WE.MCID = MCID; in scheduleMapGlobalInitializer()
1008 unsigned MCID) { in scheduleMapAppendingVariable() argument
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXReplaceImageHandles.cpp | 81 const MCInstrDesc &MCID = MI.getDesc(); in processInstr() local
83 if (MCID.TSFlags & NVPTXII::IsTexFlag) { in processInstr()
89 if (!(MCID.TSFlags & NVPTXII::IsTexModeUnifiedFlag)) { in processInstr()
95 } else if (MCID.TSFlags & NVPTXII::IsSuldMask) { in processInstr()
97 1 << (((MCID.TSFlags & NVPTXII::IsSuldMask) >> NVPTXII::IsSuldShift) - 1); in processInstr()
105 } else if (MCID.TSFlags & NVPTXII::IsSustFlag) { in processInstr()
112 } else if (MCID.TSFlags & NVPTXII::IsSurfTexQueryFlag) { in processInstr()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | ScoreboardHazardRecognizer.cpp | 122 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType() local
123 if (!MCID) { in getHazardType()
127 unsigned idx = MCID->getSchedClass(); in getHazardType()
177 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local
178 assert(MCID && "The scheduler must filter non-machineinstrs"); in EmitInstruction()
179 if (DAG->TII->isZeroCost(MCID->Opcode)) in EmitInstruction()
186 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
|
| /external/llvm/lib/CodeGen/ |
| D | ScoreboardHazardRecognizer.cpp | 120 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType() local
121 if (!MCID) { in getHazardType()
125 unsigned idx = MCID->getSchedClass(); in getHazardType()
176 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local
177 assert(MCID && "The scheduler must filter non-machineinstrs"); in EmitInstruction()
178 if (DAG->TII->isZeroCost(MCID->Opcode)) in EmitInstruction()
185 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXReplaceImageHandles.cpp | 81 const MCInstrDesc &MCID = MI.getDesc(); in processInstr() local
83 if (MCID.TSFlags & NVPTXII::IsTexFlag) { in processInstr()
89 if (!(MCID.TSFlags & NVPTXII::IsTexModeUnifiedFlag)) { in processInstr()
95 } else if (MCID.TSFlags & NVPTXII::IsSuldMask) { in processInstr()
97 1 << (((MCID.TSFlags & NVPTXII::IsSuldMask) >> NVPTXII::IsSuldShift) - 1); in processInstr()
105 } else if (MCID.TSFlags & NVPTXII::IsSustFlag) { in processInstr()
112 } else if (MCID.TSFlags & NVPTXII::IsSurfTexQueryFlag) { in processInstr()
|