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Searched refs:MCOperand_CreateReg0 (Results 1 – 12 of 12) sorted by relevance

/external/capstone/arch/Mips/
DMipsDisassembler.c604 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeAddiGroupBranch_4()
606 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeAddiGroupBranch_4()
640 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeDaddiGroupBranch_4()
642 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeDaddiGroupBranch_4()
679 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeBlezlGroupBranch_4()
681 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeBlezlGroupBranch_4()
720 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeBgtzlGroupBranch_4()
722 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeBgtzlGroupBranch_4()
764 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeBgtzGroupBranch_4()
767 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeBgtzGroupBranch_4()
[all …]
/external/capstone/arch/X86/
DX86Disassembler.c86 MCOperand_CreateReg0(mcInst, llvmRegnum); in translateRegister()
116 MCOperand_CreateReg0(mcInst, baseRegNo); in translateSrcIndex()
118 MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); in translateSrcIndex()
140 MCOperand_CreateReg0(mcInst, baseRegNo); in translateDstIndex()
415 MCOperand_CreateReg0(mcInst, X86_XMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
418 MCOperand_CreateReg0(mcInst, X86_YMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
421 MCOperand_CreateReg0(mcInst, X86_ZMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
441 MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); in translateImmediate()
470 MCOperand_CreateReg0(mcInst, X86_##x); break; in translateRMRegister()
514 MCOperand_CreateReg0(mcInst, X86_##x); break; in translateRMMemory()
[all …]
/external/capstone/arch/SystemZ/
DSystemZDisassembler.c46 MCOperand_CreateReg0(Inst, (unsigned)RegNo); in decodeRegisterClass()
264 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDAddr12Operand()
277 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDAddr20Operand()
290 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDXAddr12Operand()
292 MCOperand_CreateReg0(Inst, Index == 0 ? 0 : Regs[Index]); in decodeBDXAddr12Operand()
305 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDXAddr20Operand()
307 MCOperand_CreateReg0(Inst, Index == 0 ? 0 : Regs[Index]); in decodeBDXAddr20Operand()
320 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDLAddr12Len8Operand()
335 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDRAddr12Operand()
337 MCOperand_CreateReg0(Inst, Regs[Length]); in decodeBDRAddr12Operand()
[all …]
/external/capstone/arch/PowerPC/
DPPCDisassembler.c170 MCOperand_CreateReg0(Inst, Regs[RegNo]); in decodeRegisterClass()
299 MCOperand_CreateReg0(Inst, GP0Regs[Base]); in decodeMemRIOperands()
311 MCOperand_CreateReg0(Inst, GP0Regs[Base]); in decodeMemRIOperands()
328 MCOperand_CreateReg0(Inst, GP0Regs[Base]); in decodeMemRIXOperands()
333 MCOperand_CreateReg0(Inst, GP0Regs[Base]); in decodeMemRIXOperands()
347 MCOperand_CreateReg0(Inst, CRRegs[7 - Zeros]); in decodeCRBitMOperand()
/external/capstone/arch/Sparc/
DSparcDisassembler.c98 MCOperand_CreateReg0(Inst, Reg); in DecodeIntRegsRegisterClass()
112 MCOperand_CreateReg0(Inst, Reg); in DecodeI64RegsRegisterClass()
126 MCOperand_CreateReg0(Inst, Reg); in DecodeFPRegsRegisterClass()
140 MCOperand_CreateReg0(Inst, Reg); in DecodeDFPRegsRegisterClass()
157 MCOperand_CreateReg0(Inst, Reg); in DecodeQFPRegsRegisterClass()
168 MCOperand_CreateReg0(Inst, FCCRegDecoderTable[RegNo]); in DecodeFCCRegsRegisterClass()
/external/capstone/arch/AArch64/
DAArch64Disassembler.c292 MCOperand_CreateReg0(Inst, Register); in DecodeFPR128RegisterClass()
326 MCOperand_CreateReg0(Inst, Register); in DecodeFPR64RegisterClass()
350 MCOperand_CreateReg0(Inst, Register); in DecodeFPR32RegisterClass()
374 MCOperand_CreateReg0(Inst, Register); in DecodeFPR16RegisterClass()
398 MCOperand_CreateReg0(Inst, Register); in DecodeFPR8RegisterClass()
422 MCOperand_CreateReg0(Inst, Register); in DecodeGPR64RegisterClass()
439 MCOperand_CreateReg0(Inst, Register); in DecodeGPR64spRegisterClass()
464 MCOperand_CreateReg0(Inst, Register); in DecodeGPR32RegisterClass()
481 MCOperand_CreateReg0(Inst, Register); in DecodeGPR32spRegisterClass()
505 MCOperand_CreateReg0(Inst, Register); in DecodeVectorRegisterClass()
[all …]
/external/capstone/arch/ARM/
DARMDisassembler.c419 MCOperand_CreateReg0(Inst, 0); in DecodePredicateOperand()
421 MCOperand_CreateReg0(Inst, ARM_CPSR); in DecodePredicateOperand()
921 MCOperand_CreateReg0(Inst, Register); in DecodeGPRRegisterClass()
944 MCOperand_CreateReg0(Inst, ARM_APSR_NZCV); in DecodeGPRwithAPSRRegisterClass()
978 MCOperand_CreateReg0(Inst, RegisterPair); in DecodeGPRPairRegisterClass()
1009 MCOperand_CreateReg0(Inst, Register); in DecodetcGPRRegisterClass()
1042 MCOperand_CreateReg0(Inst, Register); in DecodeSPRRegisterClass()
1070 MCOperand_CreateReg0(Inst, Register); in DecodeDPRRegisterClass()
1108 MCOperand_CreateReg0(Inst, Register); in DecodeQPRRegisterClass()
1129 MCOperand_CreateReg0(Inst, Register); in DecodeDPairRegisterClass()
[all …]
DARMInstPrinter.c785 MCOperand_CreateReg0(&NewMI, MCRegisterInfo_getMatchingSuperReg(MRI, Reg, ARM_gsub_0, in ARM_printInst()
/external/capstone/arch/TMS320C64x/
DTMS320C64xDisassembler.c137 MCOperand_CreateReg0(Inst, Reg); in DecodeGPRegsRegisterClass()
153 MCOperand_CreateReg0(Inst, Reg); in DecodeControlRegsRegisterClass()
335 MCOperand_CreateReg0(Inst, Reg); in DecodeRegPair5()
349 MCOperand_CreateReg0(Inst, Reg); in DecodeRegPair4()
/external/capstone/
DMCInst.h75 void MCOperand_CreateReg0(MCInst *inst, unsigned Reg);
DMCInst.c156 void MCOperand_CreateReg0(MCInst *mcInst, unsigned Reg) in MCOperand_CreateReg0() function
/external/capstone/arch/XCore/
DXCoreDisassembler.c156 MCOperand_CreateReg0(Inst, Reg); in DecodeGRRegsRegisterClass()
169 MCOperand_CreateReg0(Inst, Reg); in DecodeRRegsRegisterClass()