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Searched refs:MESA_FORMAT_Z24_UNORM_X8_UINT (Results 1 – 23 of 23) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_surface_formats.c315 screen->mesa_format_supports_render[MESA_FORMAT_Z24_UNORM_X8_UINT] = true; in intel_screen_init_surface_formats()
326 screen->mesa_format_supports_texture[MESA_FORMAT_Z24_UNORM_X8_UINT] = true; in intel_screen_init_surface_formats()
465 case MESA_FORMAT_Z24_UNORM_X8_UINT: in translate_tex_format()
529 case MESA_FORMAT_Z24_UNORM_X8_UINT: in brw_depth_format()
Dintel_mipmap_tree.c114 return MESA_FORMAT_Z24_UNORM_X8_UINT; in intel_depth_format_for_depthstencil_format()
1096 if (mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT && mt->stencil_mt) in intel_miptree_match_image()
Dbrw_blorp.c221 case MESA_FORMAT_Z24_UNORM_X8_UINT: in brw_blorp_to_isl_format()
Dintel_screen.c1808 MESA_FORMAT_Z24_UNORM_X8_UINT, in intelCreateBuffer()
/external/mesa3d/src/mesa/swrast/
Ds_depth.c560 rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || in _swrast_clear_depth_buffer()
611 case MESA_FORMAT_Z24_UNORM_X8_UINT: in _swrast_clear_depth_buffer()
620 rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) in _swrast_clear_depth_buffer()
Ds_texfetch.c156 [MESA_FORMAT_Z24_UNORM_X8_UINT] = {
Ds_renderbuffer.c105 rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; in soft_renderbuffer_storage()
/external/mesa3d/src/mesa/main/
Dtexformat.c225 RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_X8_UINT); in _mesa_choose_tex_format()
230 RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_X8_UINT); in _mesa_choose_tex_format()
Dformats.h379 #define MESA_FORMAT_Z24_UNORM_X8_UINT PIPE_FORMAT_Z24X8_UNORM macro
Dtexstore.c191 assert(dstFormat == MESA_FORMAT_Z24_UNORM_X8_UINT); in _mesa_texstore_x8_z24()
594 table[MESA_FORMAT_Z24_UNORM_X8_UINT] = _mesa_texstore_x8_z24; in texstore_depth_stencil()
Dformats.c1045 case MESA_FORMAT_Z24_UNORM_X8_UINT: in _mesa_uncompressed_format_to_type_and_comps()
Dformats.csv84 MESA_FORMAT_Z24_UNORM_X8_UINT , packed, 1, 1, 1, x8 , un24, , , y___, zs
/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_fbo.c311 … if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) { in radeon_map_renderbuffer()
420 … if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) { in radeon_unmap_renderbuffer()
520 rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; in radeon_alloc_renderbuffer_storage()
Dradeon_screen.c732 radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv); in radeonCreateBuffer()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dradeon_fbo.c311 … if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) { in radeon_map_renderbuffer()
420 … if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) { in radeon_unmap_renderbuffer()
520 rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; in radeon_alloc_renderbuffer_storage()
Dradeon_screen.c732 radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv); in radeonCreateBuffer()
/external/mesa3d/src/mesa/drivers/dri/i915/
Di915_context.c125 ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true; in intel_init_texture_formats()
Di915_texstate.c92 case MESA_FORMAT_Z24_UNORM_X8_UINT: in translate_texture_format()
Dintel_fbo.c180 return MESA_FORMAT_Z24_UNORM_X8_UINT; in intel_renderbuffer_format()
Di915_vtbl.c559 format == MESA_FORMAT_Z24_UNORM_X8_UINT || in i915_render_target_supported()
Di830_vtbl.c600 format == MESA_FORMAT_Z24_UNORM_X8_UINT || in i830_render_target_supported()
/external/mesa3d/prebuilt-intermediates/main/
Dformat_pack.c10285 case MESA_FORMAT_Z24_UNORM_X8_UINT: in _mesa_get_pack_float_z_func()
10362 case MESA_FORMAT_Z24_UNORM_X8_UINT: in _mesa_get_pack_uint_z_func()
10456 case MESA_FORMAT_Z24_UNORM_X8_UINT: in _mesa_pack_float_z_row()
10530 case MESA_FORMAT_Z24_UNORM_X8_UINT: in _mesa_pack_uint_z_row()
Dformat_unpack.c6848 case MESA_FORMAT_Z24_UNORM_X8_UINT: in _mesa_unpack_float_z_row()
6951 case MESA_FORMAT_Z24_UNORM_X8_UINT: in _mesa_unpack_uint_z_row()