| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 100 Opc = isMicroMips ? Mips::MFLO16_MM : Mips::MFLO; in copyPhysReg()
238 BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0); in storeRegToStack()
350 Opc = isMicroMips ? Mips::MFLO16_MM : Mips::MFLO; in expandPostRAPseudo()
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| D | MipsISelLowering.h | 78 MFLO, enumerator
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| D | MipsSEISelLowering.cpp | 445 SDValue LoOut = CurDAG->getNode(MipsISD::MFLO, DL, MVT::i32, MAdd); in selectMADD()
517 SDValue LoOut = CurDAG->getNode(MipsISD::MFLO, DL, MVT::i32, MSub); in selectMSUB()
1284 Lo = DAG.getNode(MipsISD::MFLO, DL, Ty, Mult); in lowerMulDiv()
1304 SDValue Lo = DAG.getNode(MipsISD::MFLO, DL, MVT::i32, Op); in extractLOHI()
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| D | MipsSEFrameLowering.cpp | 800 Op = (Reg == Mips::HI0) ? Mips::MFHI : Mips::MFLO; in spillCalleeSavedRegisters()
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| D | MipsFastISel.cpp | 1698 : Mips::MFLO; in selectDivRem()
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| D | MipsInstrInfo.td | 92 def MipsMFLO : SDNode<"MipsISD::MFLO", SDT_MFLOHI>;
1977 def MFLO : MMRel, MoveFromLOHI<"mflo", GPR32Opnd, AC0>, MFLO_FM<0x12>,
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_64.c | 468 return push_inst(compiler, MFLO | D(dst), DR(dst)); in emit_single_op()
471 return push_inst(compiler, MFLO | D(dst), DR(dst)); in emit_single_op()
481 FAIL_IF(push_inst(compiler, MFLO | D(dst), DR(dst))); in emit_single_op()
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| D | sljitNativeMIPS_32.c | 375 return push_inst(compiler, MFLO | D(dst), DR(dst)); in emit_single_op()
385 FAIL_IF(push_inst(compiler, MFLO | D(dst), DR(dst))); in emit_single_op()
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| D | sljitNativeMIPS_common.c | 216 #define MFLO (HI(0) | LO(18)) macro
1254 FAIL_IF(push_inst(compiler, MFLO | D(SLJIT_R0), DR(SLJIT_R0))); in sljit_emit_op0()
1291 FAIL_IF(push_inst(compiler, MFLO | D(SLJIT_R0), DR(SLJIT_R0))); in sljit_emit_op0()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 104 Opc = isMicroMips ? Mips::MFLO16_MM : Mips::MFLO; in copyPhysReg()
305 BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0); in storeRegToStack()
424 expandPseudoMFHiLo(MBB, MI, Mips::MFLO); in expandPostRAPseudo()
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| D | MipsISelLowering.h | 128 MFLO, enumerator
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| D | MipsSEFrameLowering.cpp | 822 Op = (Reg == Mips::HI0) ? Mips::MFHI : Mips::MFLO; in spillCalleeSavedRegisters()
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| D | MipsScheduleP5600.td | 181 def : InstRW<[P5600WriteAL2], (instrs CLO, CLZ, DI, EI, MFHI, MFLO,
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| D | MipsFastISel.cpp | 1955 : Mips::MFLO; in selectDivRem()
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| D | MipsSEISelLowering.cpp | 1276 Lo = DAG.getNode(MipsISD::MFLO, DL, Ty, Mult); in lowerMulDiv()
1296 SDValue Lo = DAG.getNode(MipsISD::MFLO, DL, MVT::i32, Op); in extractLOHI()
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| D | MipsISelLowering.cpp | 205 case MipsISD::MFLO: return "MipsISD::MFLO"; in getTargetNodeName()
1049 SDValue ResLo = CurDAG.getNode(MipsISD::MFLO, DL, MVT::i32, MAdd); in performMADD_MSUBCombine()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 104 Opc = isMicroMips ? Mips::MFLO16_MM : Mips::MFLO; in copyPhysReg()
305 BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0); in storeRegToStack()
424 expandPseudoMFHiLo(MBB, MI, Mips::MFLO); in expandPostRAPseudo()
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| D | MipsISelLowering.h | 126 MFLO, enumerator
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| D | MipsSEFrameLowering.cpp | 821 Op = (Reg == Mips::HI0) ? Mips::MFHI : Mips::MFLO; in spillCalleeSavedRegisters()
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| D | MipsScheduleP5600.td | 182 def : InstRW<[P5600WriteAL2], (instrs CLO, CLZ, DI, EI, MFHI, MFLO,
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| D | MipsFastISel.cpp | 1953 : Mips::MFLO; in selectDivRem()
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| D | MipsSEISelLowering.cpp | 1276 Lo = DAG.getNode(MipsISD::MFLO, DL, Ty, Mult); in lowerMulDiv()
1296 SDValue Lo = DAG.getNode(MipsISD::MFLO, DL, MVT::i32, Op); in extractLOHI()
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| /external/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 4242 TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI); in expandDivRem()
4291 TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI); in expandDivRem()
4329 TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI); in expandDivRem()
5172 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandMulImm()
5192 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandMulO()
5214 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandMulO()
5235 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandMulOU()
5263 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandDMULMacro()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 4214 TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI); in expandDivRem()
4263 TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI); in expandDivRem()
4301 TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI); in expandDivRem()
5062 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandMulImm()
5082 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandMulO()
5104 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandMulO()
5125 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandMulOU()
5153 TOut.emitR(Mips::MFLO, DstReg, IDLoc, STI); in expandDMULMacro()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3098 TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI); in expandDiv()
3126 TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI); in expandDiv()
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