Searched refs:MIDR_IMPL_SHIFT (Results 1 – 13 of 13) sorted by relevance
25 midr_mask = (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | in midr_match()
130 impl = ((uint32_t)x2 >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in plat_sip_handler()
378 impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in tegra_soc_pwr_domain_on_finish()438 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & (uint64_t)MIDR_IMPL_MASK; in tegra_soc_pwr_domain_off()
204 impl = (read_midr() >> MIDR_IMPL_SHIFT) & (uint64_t)MIDR_IMPL_MASK; in plat_early_platform_setup()
116 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in mce_get_curr_cpu_ari_base()136 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & in mce_get_curr_cpu_ops()
207 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in nvg_online_core()
330 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in ari_online_core()
16 #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
188 (((read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK) in bl31_early_platform_setup2()
13 #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
468 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in tegra_soc_pwr_domain_off()
16 #define MIDR_IMPL_SHIFT U(24) macro
17 #define MIDR_IMPL_SHIFT U(0x18) macro