| /external/mesa3d/src/mesa/x86/ |
| D | 3dnow_xform4.S | 70 MOVQ ( REGIND(EAX), MM0 ) /* x1 | x0 */
76 MOVQ ( MM0, MM2 ) /* x1 | x0 */
79 PUNPCKLDQ ( MM0, MM0 ) /* x0 | x0 */
82 MOVQ ( MM0, MM1 ) /* x0 | x0 */
85 PFMUL ( REGIND(ECX), MM0 ) /* x0*m1 | x0*m0 */
101 PFADD ( MM0, MM2 )
159 MOVD ( REGIND(ECX), MM0 ) /* | m00 */
160 PUNPCKLDQ ( REGOFF(20, ECX), MM0 ) /* m11 | m00 */
181 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */
251 MOVQ ( MM2, MM0 ) /* x1 | x0 */
[all …]
|
| D | 3dnow_xform3.S | 70 MOVQ ( REGIND(EAX), MM0 ) /* x1 | x0 */
76 MOVQ ( MM0, MM1 ) /* x1 | x0 */
79 PUNPCKLDQ ( MM0, MM0 ) /* x0 | x0 */
85 MOVQ ( MM0, MM3 ) /* x0 | x0 */
89 PFMUL ( REGIND(ECX), MM0 ) /* x0*m1 | x0*m0 */
95 PFADD ( MM0, MM1 ) /* x0*m1+x1*m5 | x0*m0+x1*m4 */
151 MOVD ( REGIND(ECX), MM0 ) /* | m00 */
152 PUNPCKLDQ ( REGOFF(20, ECX), MM0 ) /* m11 | m00 */
173 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */
241 MOVQ ( REGIND(EAX), MM0 ) /* x1 | x0 */
[all …]
|
| D | 3dnow_xform2.S | 63 MOVD ( REGIND(ECX), MM0 ) /* | m00 */
64 PUNPCKLDQ ( REGOFF(16, ECX), MM0 ) /* m10 | m00 */
84 PFMUL ( MM0, MM6 ) /* x1*m10 | x0*m00 */
144 MOVD ( REGIND(ECX), MM0 ) /* | m00 */
145 PUNPCKLDQ ( REGOFF(20, ECX), MM0 ) /* m11 | m00 */
153 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */
200 MOVD ( REGIND(ECX), MM0 ) /* | m00 */
201 PUNPCKLDQ ( REGOFF(16, ECX), MM0 ) /* m10 | m00 */
218 PFMUL ( MM0, MM6 ) /* x1*m10 | x0*m00 */
277 MOVD ( REGIND(ECX), MM0 ) /* | m00 */
[all …]
|
| D | 3dnow_xform1.S | 63 MOVQ ( REGIND(ECX), MM0 ) /* m01 | m00 */
76 PFMUL ( MM0, MM4 ) /* x0*m01 | x0*m00 */
131 MOVD ( REGIND(EAX), MM0 ) /* | x0 */
134 MOVD ( MM0, REGIND(EDX) ) /* | r0 */
176 MOVD ( REGIND(ECX), MM0 ) /* | m00 */
185 PFMUL ( MM0, MM4 ) /* | x0*m00 */
234 MOVD ( REGIND(ECX), MM0 ) /* | m00 */
241 PFMUL ( MM0, MM4 ) /* 0 | x0*m00 */
288 MOVQ ( REGIND(ECX), MM0 ) /* m01 | m00 */
297 PFMUL ( MM0, MM4 ) /* x0*m01 | x0*m00 */
[all …]
|
| D | mmx_blend.S | 272 PXOR ( MM0, MM0 ) /* 0x0000 | 0x0000 | 0x0000 | 0x0000 */
276 GMB_UNPACK( MM1, MM2, MM4, MM5, MM0 ) ;\
384 PXOR ( MM0, MM0 ) /* 0x0000 | 0x0000 | 0x0000 | 0x0000 */ ;\
392 GMB_UNPACK( MM1, MM2, MM4, MM5, MM0 ) ;\
|
| /external/llvm/test/CodeGen/X86/ |
| D | 2007-07-03-GR64ToVR64.ll | 3 ; CHECK: movd %rsi, [[MM0:%mm[0-9]+]]
5 ; CHECK: paddusw [[MM0]], [[MM1]]
|
| D | ipra-reg-usage.ll | 6 …R12 DR13 DR14 DR15 FP0 FP1 FP2 FP3 FP4 FP5 FP6 FP7 K0 K1 K2 K3 K4 K5 K6 K7 MM0 MM1 MM2 MM3 MM4 MM5…
|
| /external/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/ |
| D | TargetTest.cpp | 186 EXPECT_THAT(setRegTo(X86::MM0, APInt(64, 0x1111222233334444ULL)), in TEST_F()
190 IsMovValueFromStack(X86::MMX_MOVQ64rm, X86::MM0), in TEST_F()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86Instr3DNow.td | 77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| D | X86CallingConv.td | 251 // MMX vector types are always returned in MM0. If the target doesn't have
252 // MM0, it doesn't support these vector types.
253 CCIfType<[x86mmx], CCAssignToReg<[MM0]>>,
804 CCAssignToReg<[MM0, MM1, MM2]>>>,
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86Instr3DNow.td | 77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| D | X86CallingConv.td | 251 // MMX vector types are always returned in MM0. If the target doesn't have
252 // MM0, it doesn't support these vector types.
253 CCIfType<[x86mmx], CCAssignToReg<[MM0]>>,
811 CCAssignToReg<[MM0, MM1, MM2]>>>,
|
| /external/ImageMagick/PerlMagick/t/reference/write/composite/ |
| D | CopyBlue.miff | 41 …�MM?�MM=�MM<�MM<�MM1�MM/�MM,�MM.�MM/�MM0�MM3�MM4�MM1�MM-�MM-�MM-�MM.�MM0�MM-�MM'�MM �MM4�MMN�MM3�M…
|
| /external/llvm/lib/Target/X86/ |
| D | X86CallingConv.td | 71 // MMX vector types are always returned in MM0. If the target doesn't have
72 // MM0, it doesn't support these vector types.
73 CCIfType<[x86mmx], CCAssignToReg<[MM0]>>,
581 CCAssignToReg<[MM0, MM1, MM2]>>>,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 209 ENTRY(MM0) \
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 207 ENTRY(MM0) \
|
| /external/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 206 ENTRY(MM0) \
|
| /external/capstone/arch/X86/ |
| D | X86DisassemblerDecoder.h | 217 ENTRY(MM0) \
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 125 {codeview::RegisterId::MM0, X86::MM0}, in initLLVMToSEHAndCVRegMapping()
|
| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 123 {codeview::RegisterId::MM0, X86::MM0}, in initLLVMToSEHAndCVRegMapping()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 139 MM0 = 119,
1239 { X86::MM0 },
2106 X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7,
2756 { 41U, X86::MM0 },
2817 { 29U, X86::MM0 },
2862 { 29U, X86::MM0 },
2923 { 41U, X86::MM0 },
2984 { 29U, X86::MM0 },
3029 { 29U, X86::MM0 },
3075 { X86::MM0, 41U },
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/ |
| D | CodeViewRegisters.def | 142 CV_REGISTER(MM0, 146)
|
| /external/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
| D | CodeViewRegisters.def | 143 CV_REGISTER(MM0, 146)
|
| /external/llvm/docs/TableGen/ |
| D | index.rst | 65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
|
| /external/llvm-project/llvm/docs/TableGen/ |
| D | index.rst | 68 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
|