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Searched refs:MM4 (Results 1 – 25 of 36) sorted by relevance

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/external/mesa3d/src/mesa/x86/
D3dnow_xform1.S72 MOVD ( REGIND(EAX), MM4 ) /* | x0 */
73 PUNPCKLDQ ( MM4, MM4 ) /* x0 | x0 */
75 MOVQ ( MM4, MM5 ) /* x0 | x0 */
76 PFMUL ( MM0, MM4 ) /* x0*m01 | x0*m00 */
79 PFADD ( MM2, MM4 ) /* x0*m01+m31 | x0*m00+m30 */
82 MOVQ ( MM4, REGIND(EDX) ) /* write r1, r0 */
184 MOVD ( REGIND(EAX), MM4 ) /* | x0 */
185 PFMUL ( MM0, MM4 ) /* | x0*m00 */
187 PFADD ( MM2, MM4 ) /* m31 | x0*m00+m30 */
188 MOVQ ( MM4, REGIND(EDX) ) /* write r1, r0 */
[all …]
Dmmx_blend.S276 GMB_UNPACK( MM1, MM2, MM4, MM5, MM0 ) ;\
277 GMB_ALPHA( MM1, MM3, MM4, MM6 ) ;\
278 GMB_LERP_GSC( MM1, MM2, MM3, MM4, MM5, MM6 ) ;\
328 MOVQ ( MM2, MM4 ) ;\
330 PXOR ( MM7, MM4 ) /* unsigned -> signed */ ;\
331 PCMPGTB ( MM3, MM4 ) /* q > p ? 0xff : 0x00 */ ;\
332 PAND ( MM4, MM1 ) /* q > p ? p : 0 */ ;\
333 PANDN ( MM2, MM4 ) /* q > p ? 0 : q */ ;\
334 POR ( MM1, MM4 ) /* q > p ? p : q */ ;\
335 GMB_STORE( rgba, MM4 )
[all …]
D3dnow_xform4.S71 MOVQ ( REGOFF(8, EAX), MM4 ) /* x3 | x2 */
77 MOVQ ( MM4, MM6 ) /* x3 | x2 */
89 PUNPCKLDQ ( MM4, MM4 ) /* x2 | x2 */
92 MOVQ ( MM4, MM5 ) /* x2 | x2 */
97 PFMUL ( REGOFF(32, ECX), MM4 ) /* x2*m9 | x2*m8 */
107 PFADD ( MM4, MM6 )
173 MOVQ ( REGIND(EAX), MM4 ) /* x1 | x0 */
181 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */
190 PFADD ( MM4, MM5 ) /* x1*m11+x2*m21 | x0*m00+x2*m20 */
252 MOVQ ( MM3, MM4 ) /* x3 | x2 */
[all …]
D3dnow_xform2.S75 MOVQ ( REGOFF(48, ECX), MM4 ) /* m31 | m30 */
88 PFADD ( MM4, MM6 ) /* x0*...*m11+m31 | x0*...*m10+m30 */
152 MOVQ ( REGIND(EAX), MM4 ) /* x1 | x0 */
153 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */
155 MOVQ ( MM4, REGIND(EDX) ) /* write r1, r0 */
209 MOVQ ( REGOFF(48, ECX), MM4 ) /* m31 | m30 */
222 PFADD ( MM4, MM6 ) /* x0*...*m11+m31 | x0*...*m10+m30 */
286 MOVQ ( REGIND(EAX), MM4 ) /* x1 | x0 */
287 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */
289 PFADD ( MM2, MM4 ) /* x1*m11+m31 | x0*m00+m30 */
[all …]
D3dnow_xform3.S88 MOVQ ( MM1, MM4 ) /* x1 | x1 */
100 PFMUL ( REGOFF(24, ECX), MM4 ) /* x1*m7 | x1*m6 */
103 PFADD ( MM3, MM4 ) /* x0*m3+x1*m7 | x0*m2+x1*m6 */
106 PFADD ( MM4, MM5 ) /* r3 | r2 */
165 MOVQ ( REGIND(EAX), MM4 ) /* x1 | x0 */
173 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */
183 PFADD ( MM4, MM5 ) /* x1*m11+x2*m21 | x0*m00+x2*m20 */
256 MOVQ ( MM1, MM4 ) /* | x2 */
259 PUNPCKLDQ ( MM4, MM4 ) /* x2 | x2 */
262 PFMUL ( REGOFF(32, ECX), MM4 ) /* x2*m9 | x2*m8 */
[all …]
/external/llvm/test/CodeGen/X86/
Dipra-reg-usage.ll6 …15 FP0 FP1 FP2 FP3 FP4 FP5 FP6 FP7 K0 K1 K2 K3 K4 K5 K6 K7 MM0 MM1 MM2 MM3 MM4 MM5 MM6 MM7 R11 ST0…
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Instr3DNow.td77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86InstrMMX.td155 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86RegisterInfo.td196 def MM4 : X86Reg<"mm4", 4>, DwarfRegNum<[45, 33, 33]>;
/external/llvm-project/llvm/lib/Target/X86/
DX86Instr3DNow.td77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86InstrMMX.td152 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h213 ENTRY(MM4) \
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h211 ENTRY(MM4) \
/external/llvm-project/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h210 ENTRY(MM4) \
/external/capstone/arch/X86/
DX86DisassemblerDecoder.h221 ENTRY(MM4) \
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp129 {codeview::RegisterId::MM4, X86::MM4}, in initLLVMToSEHAndCVRegMapping()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp127 {codeview::RegisterId::MM4, X86::MM4}, in initLLVMToSEHAndCVRegMapping()
/external/ImageMagick/PerlMagick/t/reference/write/composite/
DCopyBlue.miff41 …M:�MM<�MM@�MM?�MM=�MM<�MM<�MM1�MM/�MM,�MM.�MM/�MM0�MM3�MM4�MM1�MM-�MM-�MM-�MM.�MM0�MM-�MM'�MM�MM4…
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenRegisterInfo.inc143 MM4 = 123,
1243 { X86::MM4 },
2106 X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7,
2760 { 45U, X86::MM4 },
2821 { 33U, X86::MM4 },
2866 { 33U, X86::MM4 },
2927 { 45U, X86::MM4 },
2988 { 33U, X86::MM4 },
3033 { 33U, X86::MM4 },
3079 { X86::MM4, 45U },
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def146 CV_REGISTER(MM4, 150)
/external/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def147 CV_REGISTER(MM4, 150)
/external/llvm/docs/TableGen/
Dindex.rst65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
DLangIntro.rst543 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/llvm-project/llvm/docs/TableGen/
Dindex.rst68 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td156 def MM4 : X86Reg<"mm4", 4>, DwarfRegNum<[45, 33, 33]>;

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