| /external/mesa3d/src/mesa/x86/ |
| D | 3dnow_xform4.S | 92 MOVQ ( MM4, MM5 ) /* x2 | x2 */
100 PFMUL ( REGOFF(40, ECX), MM5 ) /* x2*m11 | x2*m10 */
109 PFADD ( MM5, MM7 )
174 MOVQ ( REGOFF(8, EAX), MM5 ) /* x3 | x2 */
180 MOVQ ( MM5, MM6 ) /* x3 | x2 */
183 PUNPCKLDQ ( MM5, MM5 ) /* x2 | x2 */
186 PFMUL ( MM2, MM5 ) /* x2*m21 | x2*m20 */
190 PFADD ( MM4, MM5 ) /* x1*m11+x2*m21 | x0*m00+x2*m20 */
193 MOVQ ( MM5, REGOFF(-16, EDX) ) /* write r0, r1 */
255 MOVQ ( MM4, MM5 ) /* x3 | x2 */
[all …]
|
| D | 3dnow_xform3.S | 80 MOVQ ( MM2, MM5 ) /* x2 | x2 */
86 PFMUL ( REGOFF(40, ECX), MM5 ) /* x2*m11 | x2*m10 */
94 PFADD ( REGOFF(56, ECX), MM5 ) /* x2*m11+m15 | x2*m10+m14 */
106 PFADD ( MM4, MM5 ) /* r3 | r2 */
107 MOVQ ( MM5, REGOFF(-8, EDX) ) /* write r2, r3 */
164 MOVD ( REGOFF(8, EAX), MM5 ) /* | x2 */
171 MOVQ ( MM5, MM6 ) /* | x2 */
174 PFSUB ( MM5, MM7 ) /* | -x2 */
177 PUNPCKLDQ ( MM5, MM5 ) /* x2 | x2 */
180 PFMUL ( MM1, MM5 ) /* x2*m21 | x2*m20 */
[all …]
|
| D | 3dnow_xform2.S | 76 MOVQ ( REGOFF(56, ECX), MM5 ) /* m33 | m32 */
100 PFADD ( MM5, MM6 ) /* x0*...*m13+m33 | x0*...*m12+m32 */
210 MOVD ( REGOFF(56, ECX), MM5 ) /* | m32 */
231 PFADD ( MM5, MM6 ) /* ***trash*** | x0*...*m12+m32 */
345 MOVD ( REGOFF(4, EAX), MM5 ) /* | x1 */
351 PUNPCKLDQ ( MM5, MM5 ) /* x1 | x1 */
353 PFMUL ( MM1, MM5 ) /* x1*m11 | x1*m10 */
356 PFADD ( MM5, MM4 ) /* x0*m01+x1*m11 | x0*m00+x1*m10 */
|
| D | 3dnow_xform1.S | 75 MOVQ ( MM4, MM5 ) /* x0 | x0 */
78 PFMUL ( MM1, MM5 ) /* x0*m03 | x0*m02 */
81 PFADD ( MM3, MM5 ) /* x0*m03+m33 | x0*m02+m32 */
84 MOVQ ( MM5, REGOFF(8, EDX) ) /* write r3, r2 */
410 MOVQ ( MM4, MM5 ) /* | x0 */
413 PFMUL ( MM1, MM5 ) /* | x0*m02 */
416 PFADD ( MM3, MM5 ) /* | x0*m02+m32 */
419 MOVD ( MM5, REGOFF(8, EDX) ) /* write r2 */
|
| D | mmx_blend.S | 276 GMB_UNPACK( MM1, MM2, MM4, MM5, MM0 ) ;\
278 GMB_LERP_GSC( MM1, MM2, MM3, MM4, MM5, MM6 ) ;\
392 GMB_UNPACK( MM1, MM2, MM4, MM5, MM0 ) ;\
393 GMB_MULT_GSR( MM1, MM2, MM4, MM5, MM7 ) ;\
394 GMB_PACK( MM2, MM5 ) ;\
|
| /external/llvm/test/CodeGen/X86/ |
| D | ipra-reg-usage.ll | 6 …P0 FP1 FP2 FP3 FP4 FP5 FP6 FP7 K0 K1 K2 K3 K4 K5 K6 K7 MM0 MM1 MM2 MM3 MM4 MM5 MM6 MM7 R11 ST0 ST1…
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86Instr3DNow.td | 77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| D | X86InstrMMX.td | 155 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| D | X86RegisterInfo.td | 197 def MM5 : X86Reg<"mm5", 5>, DwarfRegNum<[46, 34, 34]>;
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86Instr3DNow.td | 77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| D | X86InstrMMX.td | 152 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| D | X86RegisterInfo.td | 197 def MM5 : X86Reg<"mm5", 5>, DwarfRegNum<[46, 34, 34]>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 214 ENTRY(MM5) \
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 212 ENTRY(MM5) \
|
| /external/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 211 ENTRY(MM5) \
|
| /external/capstone/arch/X86/ |
| D | X86DisassemblerDecoder.h | 222 ENTRY(MM5) \
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 130 {codeview::RegisterId::MM5, X86::MM5}, in initLLVMToSEHAndCVRegMapping()
|
| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 128 {codeview::RegisterId::MM5, X86::MM5}, in initLLVMToSEHAndCVRegMapping()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 144 MM5 = 124,
1244 { X86::MM5 },
2106 X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7,
2761 { 46U, X86::MM5 },
2822 { 34U, X86::MM5 },
2867 { 34U, X86::MM5 },
2928 { 46U, X86::MM5 },
2989 { 34U, X86::MM5 },
3034 { 34U, X86::MM5 },
3080 { X86::MM5, 46U },
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/ |
| D | CodeViewRegisters.def | 147 CV_REGISTER(MM5, 151)
|
| /external/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
| D | CodeViewRegisters.def | 148 CV_REGISTER(MM5, 151)
|
| /external/llvm/docs/TableGen/ |
| D | index.rst | 65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
|
| D | LangIntro.rst | 543 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| /external/llvm-project/llvm/docs/TableGen/ |
| D | index.rst | 68 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
|
| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 157 def MM5 : X86Reg<"mm5", 5>, DwarfRegNum<[46, 34, 34]>;
|