| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips64r6InstrInfo.td | 321 (MODU GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
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| D | Mips32r6InstrInfo.td | 939 def MODU : R6MMR6Rel, MODU_ENC, MODU_DESC, ISA_MIPS32R6;
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| D | MipsScheduleGeneric.td | 200 def : InstRW<[GenericWriteDIV], (instrs MOD, MODU, DIV, DIVU)>;
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| D | MipsISelLowering.cpp | 1413 case Mips::MODU: in EmitInstrWithCustomInserter()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips64r6InstrInfo.td | 321 (MODU GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
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| D | Mips32r6InstrInfo.td | 939 def MODU : R6MMR6Rel, MODU_ENC, MODU_DESC, ISA_MIPS32R6;
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| D | MipsScheduleGeneric.td | 200 def : InstRW<[GenericWriteDIV], (instrs MOD, MODU, DIV, DIVU)>;
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| D | MipsISelLowering.cpp | 1403 case Mips::MODU: in EmitInstrWithCustomInserter()
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_common.c | 213 #define MODU (HI(0) | (3 << 6) | LO(27)) macro
1266 …FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? MODU : MOD) | S(SLJIT_R0) | T(SLJIT_R1) … in sljit_emit_op0()
1274 …FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? MODU : MOD) | S(SLJIT_R0) | T(SLJIT_R1) … in sljit_emit_op0()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 819 def MODU : R6MMR6Rel, MODU_ENC, MODU_DESC, ISA_MIPS32R6;
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| D | MipsISelLowering.cpp | 1050 case Mips::MODU: in EmitInstrWithCustomInserter()
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| /external/elfutils/po/ |
| D | pl.po | 6650 msgstr "Dopasowuje MODUŁY do nazw plików, a nie nazwy modułów"
7046 "[MODUŁ…]"
7081 "Parametr MODUŁ podaje wzorce nazw plików dopasowujące moduły do procesów.\n"
7093 "\tPOCZĄTEK+ROZMIAR IDENTYFIKATOR-KOPII PLIK PLIK-DEBUGOWANIA NAZWA-MODUŁU\n"
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1126 {DBGFIELD("MODU") 1, false, false, 10, 2, 6, 1, 0, 0}, // #866
2810 {DBGFIELD("MODU") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #866
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| D | MipsGenMCCodeEmitter.inc | 1986 UINT64_C(219), // MODU
5031 case Mips::MODU:
11448 CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // MODU = 1973
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| D | MipsGenAsmWriter.inc | 3214 268459620U, // MODU
5968 0U, // MODU
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| D | MipsGenInstrInfo.inc | 1988 MODU = 1973,
3646 MODU = 866,
6834 …:UsesCustomInserter), 0x6ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #1973 = MODU
16643 { Mips::MODU, Mips::MODU, Mips::MODU_MMR6 },
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| D | MipsGenFastISel.inc | 2678 return fastEmitInst_rr(Mips::MODU, &Mips::GPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
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| D | MipsGenGlobalISel.inc | 2070 …// (urem:{ *:[i32] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt) => (MODU:{ *:[i32] } …
2071 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::MODU,
12996 …2] }:$src2)) => (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), (MODU:{ *:[i32] } GPR32:{…
12999 GIR_BuildMI, /*InsnID*/2, /*Opcode*/Mips::MODU,
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| D | MipsGenDAGISel.inc | 16389 /* 30380*/ OPC_EmitNode1, TARGET_VAL(Mips::MODU), 0,
16395 …// Dst: (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), (MODU:{ *:[i32] } GPR32:{ *:[i32] }…
26775 /* 50663*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::MODU), 0,
26778 // Dst: (MODU:{ *:[i32] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt)
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| D | MipsGenDisassemblerTables.inc | 6307 /* 344 */ MCD::OPC_Decode, 181, 15, 50, // Opcode: MODU
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| D | MipsGenAsmMatcher.inc | 7079 …{ 6450 /* modu */, Mips::MODU, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasS…
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 1137 134241282U, // MODU
2926 0U, // MODU
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| D | MipsGenDisassemblerTables.inc | 3896 /* 296 */ MCD_OPC_Decode, 224, 8, 35, // Opcode: MODU
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