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Searched refs:MOVDDUP (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/Target/X86/InstPrinter/
DX86InstComments.cpp218 CASE_MASKZ_MOVDUP(MOVDDUP, m) in getMaskName()
219 CASE_MASKZ_MOVDUP(MOVDDUP, r) in getMaskName()
283 CASE_MASK_MOVDUP(MOVDDUP, m) in getMaskName()
284 CASE_MASK_MOVDUP(MOVDDUP, r) in getMaskName()
524 CASE_MOVDUP(MOVDDUP, r) in EmitAnyX86InstComments()
527 CASE_MOVDUP(MOVDDUP, m) in EmitAnyX86InstComments()
/external/llvm/lib/Target/X86/
DX86ISelLowering.h392 MOVDDUP, enumerator
DX86InstrFragmentsSIMD.td372 def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
DX86ISelLowering.cpp3810 case X86ISD::MOVDDUP: in isTargetShuffle()
4982 case X86ISD::MOVDDUP: in getTargetShuffleMask()
8549 unsigned Opcode = VT == MVT::v2f64 ? X86ISD::MOVDDUP : X86ISD::VBROADCAST; in lowerVectorShuffleAsBroadcast()
8550 bool BroadcastFromReg = (Opcode == X86ISD::MOVDDUP) || Subtarget.hasAVX2(); in lowerVectorShuffleAsBroadcast()
8635 Opcode = (BroadcastVT.is128BitVector() ? X86ISD::MOVDDUP : Opcode); in lowerVectorShuffleAsBroadcast()
8672 if (Opcode == X86ISD::MOVDDUP && !V.getValueType().isVector()) in lowerVectorShuffleAsBroadcast()
11178 return DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v4f64, V1); in lowerV4F64VectorShuffle()
11786 return DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v8f64, V1); in lowerV8F64VectorShuffle()
22240 case X86ISD::MOVDDUP: return "X86ISD::MOVDDUP"; in getTargetNodeName()
24769 Shuffle = X86ISD::MOVDDUP; in matchUnaryVectorShuffle()
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DX86InstrSSE.td5097 // SSE3 - Replicate Double FP - MOVDDUP
5131 defm MOVDDUP : sse3_replicate_dfp<"movddup">;
DX86InstrAVX512.td7452 // AVX-512 - MOVDDUP
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86InstComments.cpp660 CASE_MOVDUP(MOVDDUP, r) in EmitAnyX86InstComments()
664 CASE_MOVDUP(MOVDDUP, m) in EmitAnyX86InstComments()
/external/llvm/test/CodeGen/X86/
Dvector-shuffle-combining-ssse3.ll8 ; Combine tests involving SSE3/SSSE3 target shuffles (MOVDDUP, MOVSHDUP, MOVSLDUP, PSHUFB)
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86InstComments.cpp799 CASE_MOVDUP(MOVDDUP, r) in EmitAnyX86InstComments()
803 CASE_MOVDUP(MOVDDUP, m) in EmitAnyX86InstComments()
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h452 MOVDDUP, enumerator
DX86InstrFragmentsSIMD.td405 def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
DX86ISelLowering.cpp4801 case X86ISD::MOVDDUP: in isTargetShuffle()
7087 case X86ISD::MOVDDUP: in getTargetShuffleMask()
8107 SDValue Dup = DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v2f64, NewBV); in LowerBuildVectorv4x32()
13449 ? X86ISD::MOVDDUP in lowerShuffleAsBroadcast()
13451 bool BroadcastFromReg = (Opcode == X86ISD::MOVDDUP) || Subtarget.hasAVX2(); in lowerShuffleAsBroadcast()
13591 if (Opcode == X86ISD::MOVDDUP && !V.getValueType().isVector()) in lowerShuffleAsBroadcast()
16628 return DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v4f64, V1); in lowerV4F64Shuffle()
17453 return DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v8f64, V1); in lowerV8F64Shuffle()
30914 NODE_NAME_CASE(MOVDDUP) in getTargetNodeName()
34556 Shuffle = X86ISD::MOVDDUP; in matchUnaryShuffle()
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DX86InstrSSE.td4393 // SSE3 - Replicate Double FP - MOVDDUP
4429 defm MOVDDUP : sse3_replicate_dfp<"movddup", SchedWriteFShuffle>;
DX86InstrAVX512.td10854 // AVX-512 - MOVDDUP
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h388 MOVDDUP, enumerator
DX86InstrFragmentsSIMD.td396 def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
DX86ISelLowering.cpp4703 case X86ISD::MOVDDUP: in isTargetShuffle()
6809 case X86ISD::MOVDDUP: in getTargetShuffleMask()
7816 SDValue Dup = DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v2f64, NewBV); in LowerBuildVectorv4x32()
12705 ? X86ISD::MOVDDUP in lowerShuffleAsBroadcast()
12707 bool BroadcastFromReg = (Opcode == X86ISD::MOVDDUP) || Subtarget.hasAVX2(); in lowerShuffleAsBroadcast()
12796 ? X86ISD::MOVDDUP in lowerShuffleAsBroadcast()
12838 if (Opcode == X86ISD::MOVDDUP && !V.getValueType().isVector()) in lowerShuffleAsBroadcast()
15838 return DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v4f64, V1); in lowerV4F64Shuffle()
16620 return DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v8f64, V1); in lowerV8F64Shuffle()
29771 case X86ISD::MOVDDUP: return "X86ISD::MOVDDUP"; in getTargetNodeName()
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DX86InstrSSE.td4392 // SSE3 - Replicate Double FP - MOVDDUP
4428 defm MOVDDUP : sse3_replicate_dfp<"movddup", SchedWriteFShuffle>;
DX86InstrAVX512.td10712 // AVX-512 - MOVDDUP
/external/llvm-project/llvm/test/CodeGen/X86/
Dvector-shuffle-combining-ssse3.ll8 ; Combine tests involving SSE3/SSSE3 target shuffles (MOVDDUP, MOVSHDUP, MOVSLDUP, PSHUFB)
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc4680 // FastEmit functions for X86ISD::MOVDDUP.
6920 case X86ISD::MOVDDUP: return fastEmit_X86ISD_MOVDDUP_r(VT, RetVT, Op0, Op0IsKill);