| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-movi.ll | 43 ; Tests for MOVZ with MOVK.
76 ; Tests for MOVN with MOVK.
93 ; Tests for ORR with MOVK.
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_64.c | 105 #define MOVK 0xf2800000 macro
149 FAIL_IF(push_inst(compiler, MOVK | RD(dst) | (((imm >> 16) & 0xffff) << 5) | (1 << 21))); in emit_imm64_const()
150 FAIL_IF(push_inst(compiler, MOVK | RD(dst) | (((imm >> 32) & 0xffff) << 5) | (2 << 21))); in emit_imm64_const()
151 return push_inst(compiler, MOVK | RD(dst) | ((imm >> 48) << 5) | (3 << 21)); in emit_imm64_const()
339 buf_ptr[1] = MOVK | dst | (((addr >> 16) & 0xffff) << 5) | (1 << 21); in sljit_generate_code()
341 buf_ptr[2] = MOVK | dst | (((addr >> 32) & 0xffff) << 5) | (2 << 21); in sljit_generate_code()
343 buf_ptr[3] = MOVK | dst | (((addr >> 48) & 0xffff) << 5) | (3 << 21); in sljit_generate_code()
523 return push_inst(compiler, MOVK | RD(dst) | ((imm & 0xffff0000l) >> (16 - 5)) | (1 << 21)); in load_immediate()
535 return push_inst(compiler, MOVK | RD(dst) | ((imm & 0xffff0000l) >> (16 - 5)) | (1 << 21)); in load_immediate()
564 FAIL_IF(push_inst(compiler, MOVK | RD(dst) | ((~simm & 0xffff) << 5) | (i << 21))); in load_immediate()
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-movi.ll | 72 ; Tests for MOVZ with MOVK.
147 ; Tests for MOVN with MOVK.
168 ; Tests for ORR with MOVK.
|
| D | fpimm.ll | 48 ; 64-bit ORR followed by MOVK.
|
| D | stp-opt-with-renaming.mir | 79 # MOVK has a tied operand and we currently do not rename across tied defs.
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 13 # MOVK with sf == 0 and hw<1> == 1 is unallocated.
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 13 # MOVK with sf == 0 and hw<1> == 1 is unallocated.
|
| /external/OpenCSD/decoder/tests/snapshots/juno_r1_1/ds-5-dumps/ |
| D | Trace_Report_0x15_cpu_5_2015Sep17_105126.txt | 113 EL1N:0xFFFFFFC0000C5408 F2A4B824 MOVK x4,#0x25c1,LSL #16
115 EL1N:0xFFFFFFC0000C5410 F2C00044 MOVK x4,#2,LSL #32
119 EL1N:0xFFFFFFC0000C5420 F2A77341 MOVK x1,#0x3b9a,LSL #16
123 EL1N:0xFFFFFFC0000C5430 F2A4B824 MOVK x4,#0x25c1,LSL #16
125 EL1N:0xFFFFFFC0000C5438 F2C00044 MOVK x4,#2,LSL #32
131 EL1N:0xFFFFFFC0000C5450 F2A77344 MOVK x4,#0x3b9a,LSL #16
138 EL1N:0xFFFFFFC0000C546C F2A77341 MOVK x1,#0x3b9a,LSL #16
604 EL1N:0xFFFFFFC00009574C 72A00060 MOVK w0,#3,LSL #16
673 EL1N:0xFFFFFFC00009574C 72A00060 MOVK w0,#3,LSL #16
959 EL1N:0xFFFFFFC000095968 72A00064 MOVK w4,#3,LSL #16
|
| D | Trace_Report_0x10_cpu_0_2015Sep17_104900.txt | 10716 EL1N:0xFFFFFFC0000C5408 F2A4B824 MOVK x4,#0x25c1,LSL #16
10718 EL1N:0xFFFFFFC0000C5410 F2C00044 MOVK x4,#2,LSL #32
10722 EL1N:0xFFFFFFC0000C5420 F2A77341 MOVK x1,#0x3b9a,LSL #16
10726 EL1N:0xFFFFFFC0000C5430 F2A4B824 MOVK x4,#0x25c1,LSL #16
10728 EL1N:0xFFFFFFC0000C5438 F2C00044 MOVK x4,#2,LSL #32
10734 EL1N:0xFFFFFFC0000C5450 F2A77344 MOVK x4,#0x3b9a,LSL #16
10741 EL1N:0xFFFFFFC0000C546C F2A77341 MOVK x1,#0x3b9a,LSL #16
22566 EL1N:0xFFFFFFC0000C50C4 F2A0BEA1 MOVK x1,#0x5f5,LSL #16
22728 EL1N:0xFFFFFFC0000C5408 F2A4B824 MOVK x4,#0x25c1,LSL #16
22730 EL1N:0xFFFFFFC0000C5410 F2C00044 MOVK x4,#2,LSL #32
[all …]
|
| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 802 MOVK = 0x60000000, enumerator
807 MOVK_w = MoveWideImmediateFixed | MOVK,
808 MOVK_x = MoveWideImmediateFixed | MOVK | SixtyFourBits
|
| D | assembler-aarch64.h | 2095 MoveWide(rd, imm, shift, MOVK);
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 131 // MOVN,MOVZ,MOVK
|
| D | AArch64SchedFalkorDetails.td | 1232 def : InstRW<[FalkorWr_1XYZ_0cyc], (instregex "^MOVK(W|X)i$")>; // imm fwd
|
| D | AArch64InstrInfo.td | 1168 defm MOVK : InsertImmediate<0b11, "movk">;
1302 // Deal with the various forms of (ELF) large addressing with MOVZ/MOVK
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 130 // MOVN,MOVZ,MOVK
|
| D | AArch64SchedFalkorDetails.td | 1232 def : InstRW<[FalkorWr_1XYZ_0cyc], (instregex "^MOVK(W|X)i$")>; // imm fwd
|
| D | AArch64InstrInfo.td | 1025 defm MOVK : InsertImmediate<0b11, "movk">;
1159 // Deal with the various forms of (ELF) large addressing with MOVZ/MOVK
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 129 // MOVN,MOVZ,MOVK
|
| D | AArch64InstrInfo.td | 442 defm MOVK : InsertImmediate<0b11, "movk">;
569 // Deal with the various forms of (ELF) large addressing with MOVZ/MOVK
|
| /external/OpenCSD/decoder/tests/snapshots-ete/002-ack_test_scr/ |
| D | test_TARMAC | 202 89 clk cpu0 IT (89) 163a0ce8 f2a618a1 O EL3h_s : MOVK x1,#0x30c5,LSL #16
1059 474 clk cpu0 IT (438) 163a0e18 f2a26000 O EL3h_s : MOVK x0,#0x1300,LSL #16
1061 475 clk cpu0 IT (439) 163a0e1c f2c00000 O EL3h_s : MOVK x0,#0,LSL #32
1063 476 clk cpu0 IT (440) 163a0e20 f2e00000 O EL3h_s : MOVK x0,#0,LSL #48
3309 1359 clk cpu0 IT (1323) 0009866c:00001009866c 72b201a8 O EL3h_s : MOVK w8,#0x900d,LSL #16
3424 1396 clk cpu0 IT (1360) 0009866c:00001009866c 72b201a8 O EL3h_s : MOVK w8,#0x900d,LSL #16
3542 1447 clk cpu0 IT (1411) 00093fd4:000010093fd4 72a618ba O EL3h_s : MOVK w26,#0x30c5,LSL #16
3544 1448 clk cpu0 IT (1412) 00093fd8:000010093fd8 72a018b6 O EL3h_s : MOVK w22,#0xc5,LSL #16
3891 1593 clk cpu0 IT (1557) 000942e0:0000100942e0 72a00089 O EL3h_s : MOVK w9,#4,LSL #16
3961 1619 clk cpu0 IT (1583) 00094340:000010094340 72a00088 O EL3h_s : MOVK w8,#4,LSL #16
[all …]
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1923 ### MOVK ### subsection
|