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Searched refs:MOVSS (Results 1 – 23 of 23) sorted by relevance

/external/mesa3d/src/mesa/x86/
Dsse_normal.S77 MOVSS ( M(0), XMM1 ) /* m0 */
78 MOVSS ( M(5), XMM2 ) /* m5 */
80 MOVSS ( ARG_SCALE, XMM0 ) /* scale */
91 MOVSS ( S(2), XMM2 ) /* uz */
93 MOVSS ( XMM2, D(2) ) /* ->D(2) */
139 MOVSS ( M(0), XMM0 ) /* m0 */
140 MOVSS ( M(4), XMM1 ) /* m4 */
143 MOVSS ( ARG_SCALE, XMM4 ) /* scale */
147 MOVSS ( M(1), XMM1 ) /* m1 */
148 MOVSS ( M(5), XMM2 ) /* m5 */
[all …]
Dsse_xform3.S86 MOVSS ( REGOFF(0, ESI), XMM4 ) /* | | | ox */
88 MOVSS ( REGOFF(4, ESI), XMM5 ) /* | | | oy */
90 MOVSS ( REGOFF(8, ESI), XMM6 ) /* | | | oz */
153 MOVSS ( S(2), XMM0 )
154 MOVSS ( XMM0, D(2) )
205 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
206 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
209 MOVSS ( M(10), XMM3 ) /* - | - | - | m10 */
210 MOVSS ( M(14), XMM4 ) /* - | - | - | m14 */
220 MOVSS ( S(2), XMM0 ) /* sz */
[all …]
Dsse_xform1.S83 MOVSS( S(0), XMM2 ) /* ox */
187 MOVSS( M(0), XMM0 ) /* m0 */
188 MOVSS( M(12), XMM1 ) /* m12 */
189 MOVSS( M(13), XMM2 ) /* m13 */
190 MOVSS( M(14), XMM3 ) /* m14 */
194 MOVSS( S(0), XMM4 ) /* ox */
197 MOVSS( XMM4, D(0) )
199 MOVSS( XMM2, D(1) )
200 MOVSS( XMM3, D(2) )
249 MOVSS( M(0), XMM1 ) /* m0 */
[all …]
Dsse_xform2.S83 MOVSS( S(0), XMM3 ) /* ox */
86 MOVSS( S(1), XMM4 ) /* oy */
193 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
194 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
197 MOVSS ( M(14), XMM3 ) /* - | - | - | m14 */
206 MOVSS ( XMM3, D(2) ) /* -> D(2) */
252 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
253 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
255 MOVSS ( M(14), XMM3 ) /* m14 */
263 MOVSS( XMM3, D(2) ) /* ->D(2) */
[all …]
Dsse_xform4.S79 MOVSS( SRC(0), XMM0 ) /* ox */
83 MOVSS( SRC(1), XMM1 ) /* oy */
87 MOVSS( SRC(2), XMM2 ) /* oz */
91 MOVSS( SRC(3), XMM3 ) /* ow */
151 MOVSS( SRC(0), XMM4 ) /* ox */
155 MOVSS( SRC(1), XMM5 ) /* oy */
159 MOVSS( SRC(2), XMM6 ) /* oz */
163 MOVSS( SRC(3), XMM7 ) /* ow */
172 MOVSS( SRC(3), XMM4 ) /* ow */
173 MOVSS( XMM4, DST(3) ) /* ->D(3) */
Dassyntax.h1678 #define MOVSS(a, b) movss P_ARG2(a, b) macro
/external/llvm/lib/Target/X86/
DX86ISelLowering.h401 MOVSS, enumerator
DX86InstrFragmentsSIMD.td377 def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
DX86IntrinsicsInfo.h811 X86ISD::MOVSS, 0),
DX86InstrSSE.td568 defm MOVSS : sse12_move<FR32, X86Movss, v4f32, f32mem, "movss",
574 defm MOVSS : sse12_move_rm<FR32, f32mem, loadf32, "movss",
683 // MOVSS to the lower bits.
707 // Shuffle with MOVSS
DX86ISelLowering.cpp3811 case X86ISD::MOVSS: in isTargetShuffle()
3861 case X86ISD::MOVSS: in getTargetShuffleNode()
4965 case X86ISD::MOVSS: in getTargetShuffleMask()
8443 return DAG.getNode(EltVT == MVT::f32 ? X86ISD::MOVSS : X86ISD::MOVSD, DL, in lowerVectorShuffleAsElementInsertion()
20122 unsigned TargetOpcode = X86ISD::MOVSS; in LowerShift()
22244 case X86ISD::MOVSS: return "X86ISD::MOVSS"; in getTargetNodeName()
31011 case X86ISD::MOVSS: in PerformDAGCombine()
DX86InstrAVX512.td2988 // AVX-512 MOVSS, MOVSD
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h458 MOVSS, enumerator
DX86InstrFragmentsSIMD.td413 def X86Movss : SDNode<"X86ISD::MOVSS",
DX86InstrSSE.td268 defm MOVSS : sse12_move<FR32, X86Movss, v4f32, f32mem, "movss",
269 SSEPackedSingle, "MOVSS", UseSSE1>, XS;
274 defm MOVSS : sse12_move_rm<FR32, v4f32, f32mem, loadf32, X86vzload32, "movss",
297 // MOVSS to the lower bits.
316 // MOVSS to the lower bits.
DX86ISelLowering.cpp4802 case X86ISD::MOVSS: in isTargetShuffle()
7057 case X86ISD::MOVSS: in getTargetShuffleMask()
13272 return DAG.getNode(EltVT == MVT::f32 ? X86ISD::MOVSS : X86ISD::MOVSD, DL, in lowerShuffleAsElementInsertion()
30918 NODE_NAME_CASE(MOVSS) in getTargetNodeName()
34789 Shuffle = X86ISD::MOVSS; in matchBinaryShuffle()
37019 case X86ISD::MOVSS: { in combineTargetShuffle()
49845 case X86ISD::MOVSS: in PerformDAGCombine()
DX86InstrAVX512.td3976 // AVX-512 MOVSS, MOVSD
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h394 MOVSS, enumerator
DX86InstrFragmentsSIMD.td404 def X86Movss : SDNode<"X86ISD::MOVSS",
DX86InstrSSE.td268 defm MOVSS : sse12_move<FR32, X86Movss, v4f32, f32mem, "movss",
269 SSEPackedSingle, "MOVSS", UseSSE1>, XS;
274 defm MOVSS : sse12_move_rm<FR32, v4f32, f32mem, loadf32, X86vzload32, "movss",
297 // MOVSS to the lower bits.
316 // MOVSS to the lower bits.
DX86ISelLowering.cpp4704 case X86ISD::MOVSS: in isTargetShuffle()
6777 case X86ISD::MOVSS: in getTargetShuffleMask()
12526 return DAG.getNode(EltVT == MVT::f32 ? X86ISD::MOVSS : X86ISD::MOVSD, DL, in lowerShuffleAsElementInsertion()
29775 case X86ISD::MOVSS: return "X86ISD::MOVSS"; in getTargetNodeName()
33153 Shuffle = X86ISD::MOVSS; in matchBinaryShuffle()
34677 case X86ISD::MOVSS: { in combineTargetShuffle()
46058 case X86ISD::MOVSS: in PerformDAGCombine()
DX86InstrAVX512.td3947 // AVX-512 MOVSS, MOVSD
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc12559 // FastEmit functions for X86ISD::MOVSS.
15186 case X86ISD::MOVSS: return fastEmit_X86ISD_MOVSS_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);