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Searched refs:MPIDR_AFF0_SHIFT (Results 1 – 25 of 32) sorted by relevance

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/external/arm-trusted-firmware/plat/mediatek/mt8192/
Dplat_topology.c47 if (mpidr & (MPIDR_AFFLVL_MASK << MPIDR_AFF0_SHIFT)) { in plat_core_pos_by_mpidr()
60 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/arm/common/
Darm_topology.c31 pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
36 cpu_id = (unsigned int) ((mpidr >> MPIDR_AFF0_SHIFT) & in arm_check_mpidr()
/external/arm-trusted-firmware/plat/layerscape/common/
Dls_topology.c21 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in ls_check_mpidr()
/external/arm-trusted-firmware/plat/intel/soc/common/
Dsocfpga_topology.c37 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/arm/board/a5ds/
Da5ds_topology.c39 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/amlogic/common/
Daml_topology.c44 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/rpi/common/
Drpi3_topology.c47 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/qemu/common/
Dtopology.c48 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_topology.c53 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_topology.c53 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/mediatek/mt8173/
Dplat_topology.c47 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/mediatek/mt8183/
Dplat_topology.c46 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/socionext/uniphier/
Duniphier_topology.c35 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/socionext/synquacer/
Dsq_topology.c23 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/renesas/common/
Dplat_topology.c34 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/qemu/qemu_sbsa/
Dsbsa_topology.c50 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/arm/board/morello/aarch64/
Dmorello_helper.S42 ubfx x0, x4, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/external/arm-trusted-firmware/plat/arm/board/tc0/include/
Dtc0_helpers.S40 ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/external/arm-trusted-firmware/plat/arm/board/n1sdp/aarch64/
Dn1sdp_helper.S41 ubfx x0, x4, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/external/arm-trusted-firmware/plat/arm/board/corstone700/common/
Dcorstone700_helpers.S89 ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/external/arm-trusted-firmware/plat/arm/css/sgm/aarch64/
Dcss_sgm_helpers.S42 ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/external/arm-trusted-firmware/plat/arm/css/sgi/aarch64/
Dsgi_helper.S44 ubfx x0, x4, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/external/arm-trusted-firmware/plat/arm/board/a5ds/aarch32/
Da5ds_helpers.S115 ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/external/arm-trusted-firmware/plat/arm/board/fvp/aarch32/
Dfvp_helpers.S132 ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/external/arm-trusted-firmware/plat/allwinner/common/
Dsunxi_cpu_ops.c117 (core << MPIDR_AFF0_SHIFT) | in sunxi_disable_secondary_cpus()

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