| /external/arm-trusted-firmware/plat/nvidia/tegra/drivers/flowctrl/ |
| D | flowctrl.c | 86 unsigned int i, cpu = read_mpidr() & MPIDR_CPU_MASK; in tegra_fc_ccplex_pgexit_lock()
125 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_fc_cpu_powerdn()
136 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_fc_cluster_idle()
157 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_fc_cluster_powerdn()
178 unsigned int i, cpu = read_mpidr() & MPIDR_CPU_MASK; in tegra_fc_is_ccx_allowed()
203 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_fc_soc_powerdn()
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| /external/arm-trusted-firmware/plat/mediatek/mt8173/ |
| D | power_tracer.c | 20 (mpidr & MPIDR_CPU_MASK)); in trace_power_flow()
25 (mpidr & MPIDR_CPU_MASK)); in trace_power_flow()
30 (mpidr & MPIDR_CPU_MASK)); in trace_power_flow()
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| /external/arm-trusted-firmware/plat/mediatek/mt6795/ |
| D | power_tracer.c | 20 (mpidr & MPIDR_CPU_MASK)); in trace_power_flow()
25 (mpidr & MPIDR_CPU_MASK)); in trace_power_flow()
30 (mpidr & MPIDR_CPU_MASK)); in trace_power_flow()
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| D | plat_pm.c | 77 cpuid = mpidr & MPIDR_CPU_MASK; in get_core_data()
253 cpu_id = mpidr & MPIDR_CPU_MASK; in plat_affinst_on()
326 cpu_id = mpidr & MPIDR_CPU_MASK; in plat_affinst_suspend()
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| /external/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/ |
| D | plat_psci_handlers.c | 67 int cpu = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_validate_power_state()
92 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_soc_pwr_domain_on()
128 tegra_fc_cpu_off(read_mpidr() & MPIDR_CPU_MASK); in tegra_soc_pwr_domain_off()
151 int cpu = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_pwr_domain_suspend()
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| /external/arm-trusted-firmware/plat/rockchip/common/aarch32/ |
| D | plat_helpers.S | 39 and r1, r0, #MPIDR_CPU_MASK
67 ldr r1, =(PLAT_RK_MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
69 ldr r1, =(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
98 and r5, r0, #MPIDR_CPU_MASK
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| /external/arm-trusted-firmware/plat/imx/common/ |
| D | imx8_helpers.S | 57 and x0, x0, #(MPIDR_CPU_MASK)
71 and x1, x0, #MPIDR_CPU_MASK
83 and x1, x0, #MPIDR_CPU_MASK
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| /external/arm-trusted-firmware/plat/mediatek/mt8183/aarch64/ |
| D | plat_helpers.S | 16 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
30 and x1, x0, #MPIDR_CPU_MASK
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| /external/arm-trusted-firmware/plat/rockchip/common/aarch64/ |
| D | plat_helpers.S | 56 and x1, x0, #MPIDR_CPU_MASK
79 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
105 and x19, x0, #MPIDR_CPU_MASK
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| /external/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/ |
| D | plat_helpers.S | 31 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
45 and x1, x0, #MPIDR_CPU_MASK
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| /external/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| D | hikey960_pm.c | 64 unsigned int core = mpidr & MPIDR_CPU_MASK; in hikey960_pwr_domain_on()
95 unsigned int core = mpidr & MPIDR_CPU_MASK; in hikey960_pwr_domain_off()
191 unsigned int core = mpidr & MPIDR_CPU_MASK; in hikey960_pwr_domain_suspend()
267 unsigned int core = mpidr & MPIDR_CPU_MASK; in hikey960_pwr_domain_suspend_finish()
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| /external/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/ |
| D | spm_mcdi.c | 306 int core_id_val = mpidr & MPIDR_CPU_MASK; in spm_mcdi_wfi_sel_enter()
357 int core_id_val = mpidr & MPIDR_CPU_MASK; in spm_mcdi_wfi_sel_leave()
409 unsigned long cpu_id = mpidr & MPIDR_CPU_MASK; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
496 (mpidr & MPIDR_CPU_MASK); in spm_mcdi_finish_for_on_state()
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| D | spm_hotplug.c | 241 (mpidr & MPIDR_CPU_MASK); in spm_hotplug_on()
262 (mpidr & MPIDR_CPU_MASK); in spm_hotplug_off()
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| /external/arm-trusted-firmware/services/spd/tlkd/ |
| D | tlkd_pm.c | 43 int cpu = read_mpidr() & MPIDR_CPU_MASK; in cpu_suspend_handler()
75 int cpu = read_mpidr() & MPIDR_CPU_MASK; in cpu_resume_handler()
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| /external/arm-trusted-firmware/plat/amlogic/common/aarch64/ |
| D | aml_helpers.S | 35 and x0, x0, #MPIDR_CPU_MASK
45 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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| /external/arm-trusted-firmware/plat/mediatek/mt6795/aarch64/ |
| D | plat_helpers.S | 48 and x2, x1, #MPIDR_CPU_MASK
91 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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| /external/arm-trusted-firmware/plat/qemu/common/aarch64/ |
| D | plat_helpers.S | 33 and x1, x0, #MPIDR_CPU_MASK
49 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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| /external/arm-trusted-firmware/plat/qemu/common/aarch32/ |
| D | plat_helpers.S | 34 and r1, r0, #MPIDR_CPU_MASK
49 ldr r1, =(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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| /external/arm-trusted-firmware/plat/intel/soc/common/aarch64/ |
| D | plat_helpers.S | 50 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
63 and x1, x0, #MPIDR_CPU_MASK
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| /external/arm-trusted-firmware/plat/rpi/common/aarch64/ |
| D | plat_helpers.S | 44 and x1, x0, #MPIDR_CPU_MASK
59 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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| /external/arm-trusted-firmware/drivers/renesas/common/pwrc/ |
| D | pwrc.c | 175 cpu = mpidr & MPIDR_CPU_MASK; in rcar_pwrc_status()
239 cpu = mpidr & MPIDR_CPU_MASK; in rcar_pwrc_cpuon()
256 cpu = mpidr & MPIDR_CPU_MASK; in rcar_pwrc_cpuoff()
277 cpu = mpidr & MPIDR_CPU_MASK; in rcar_pwrc_enable_interrupt_wakeup()
297 cpu = mpidr & MPIDR_CPU_MASK; in rcar_pwrc_disable_interrupt_wakeup()
856 my_cpu = mpidr & ((uint64_t)(MPIDR_CPU_MASK)); in rcar_pwrc_cpu_on_check()
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| /external/arm-trusted-firmware/plat/xilinx/zynqmp/ |
| D | plat_zynqmp.c | 16 if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT) { in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/xilinx/versal/ |
| D | plat_versal.c | 16 if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT) { in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/hisilicon/poplar/ |
| D | plat_topology.c | 29 if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT) in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/hisilicon/hikey/ |
| D | hikey_pm.c | 100 unsigned int cpu = mpidr & MPIDR_CPU_MASK; in hikey_pwr_domain_suspend()
145 cpu = mpidr & MPIDR_CPU_MASK; in hikey_pwr_domain_suspend_finish()
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