| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 742 MLOAD, MSTORE, enumerator
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| D | SelectionDAGNodes.h | 1116 N->getOpcode() == ISD::MSTORE ||
1883 N->getOpcode() == ISD::MSTORE;
1913 : MaskedLoadStoreSDNode(ISD::MSTORE, Order, dl, VTs, MemVT, MMO) {
1924 return N->getOpcode() == ISD::MSTORE;
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| /external/capstone/arch/EVM/ |
| D | EVMMappingInsn.inc | 86 { 2, 0, 3 }, // MSTORE
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 892 MLOAD, MSTORE, enumerator
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| D | SelectionDAGNodes.h | 1417 N->getOpcode() == ISD::MSTORE ||
2322 N->getOpcode() == ISD::MSTORE;
2363 : MaskedLoadStoreSDNode(ISD::MSTORE, Order, dl, VTs, AM, MemVT, MMO) {
2385 return N->getOpcode() == ISD::MSTORE;
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1078 MSTORE, enumerator
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| D | SelectionDAGNodes.h | 1341 case ISD::MSTORE:
1377 N->getOpcode() == ISD::MSTORE ||
2334 N->getOpcode() == ISD::MSTORE;
2375 : MaskedLoadStoreSDNode(ISD::MSTORE, Order, dl, VTs, AM, MemVT, MMO) {
2397 return N->getOpcode() == ISD::MSTORE;
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 115 setOperationAction(ISD::MSTORE, T, Custom); in initializeHVXLowering()
170 setOperationAction(ISD::MSTORE, T, Custom); in initializeHVXLowering()
218 setOperationAction(ISD::MSTORE, BoolW, Custom); in initializeHVXLowering()
1699 assert(Opc == ISD::MLOAD || Opc == ISD::MSTORE); in LowerHvxMaskedOp()
1831 assert(MemOpc == ISD::MLOAD || MemOpc == ISD::MSTORE); in SplitHvxMemOp()
1854 if (MemOpc == ISD::MSTORE) { in SplitHvxMemOp()
2032 case ISD::MSTORE: in LowerHvxOperation()
2085 case ISD::MSTORE: return LowerHvxMaskedOp(Op, DAG); in LowerHvxOperation()
2129 case ISD::MSTORE: in LowerHvxOperationWrapper()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 248 } else if (Op.getOpcode() == ISD::MSCATTER || Op.getOpcode() == ISD::MSTORE) in LegalizeOp()
347 case ISD::MSTORE: in LegalizeOp()
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| D | SelectionDAGDumper.cpp | 295 case ISD::MSTORE: return "masked_store"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 1472 case ISD::MSTORE: in SplitVectorOperand()
3085 case ISD::MSTORE: Res = WidenVecOp_MSTORE(N, OpNo); break; in WidenVectorOperand()
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| D | LegalizeIntegerTypes.cpp | 904 case ISD::MSTORE: Res = PromoteIntOp_MSTORE(cast<MaskedStoreSDNode>(N), in PromoteIntegerOperand()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 371 case ISD::MSTORE: return "masked_store"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 1939 case ISD::MSTORE: in SplitVectorOperand()
4194 case ISD::MSTORE: Res = WidenVecOp_MSTORE(N, OpNo); break; in WidenVectorOperand()
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| D | SelectionDAG.cpp | 583 case ISD::MSTORE: { in AddNodeIDCustom()
7128 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops); in getMaskedStore()
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| D | LegalizeIntegerTypes.cpp | 1275 case ISD::MSTORE: Res = PromoteIntOp_MSTORE(cast<MaskedStoreSDNode>(N), in PromoteIntegerOperand()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 383 case ISD::MSTORE: return "masked_store"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 2076 case ISD::MSTORE: in SplitVectorOperand()
4358 case ISD::MSTORE: Res = WidenVecOp_MSTORE(N, OpNo); break; in WidenVectorOperand()
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| D | SelectionDAG.cpp | 634 case ISD::MSTORE: { in AddNodeIDCustom()
7262 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops); in getMaskedStore()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 525 def masked_store : SDNode<"ISD::MSTORE", SDTMaskedStore,
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 620 def masked_st : SDNode<"ISD::MSTORE", SDTMaskedStore,
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| /external/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 629 def masked_st : SDNode<"ISD::MSTORE", SDTMaskedStore,
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1092 setOperationAction(ISD::MSTORE, VT, Legal); in X86TargetLowering()
1213 setOperationAction(ISD::MSTORE, MVT::v8i32, Custom); in X86TargetLowering()
1214 setOperationAction(ISD::MSTORE, MVT::v8f32, Custom); in X86TargetLowering()
1403 setOperationAction(ISD::MSTORE, VT, Legal); in X86TargetLowering()
1489 setOperationAction(ISD::MSTORE, VT, Action); in X86TargetLowering()
1504 setOperationAction(ISD::MSTORE, VT, Legal); in X86TargetLowering()
1653 setTargetDAGCombine(ISD::MSTORE); in X86TargetLowering()
21764 case ISD::MSTORE: return LowerMSTORE(Op, Subtarget, DAG); in LowerOperation()
30969 case ISD::MSTORE: return combineMaskedStore(N, DAG, Subtarget); in PerformDAGCombine()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1390 case ISD::MSTORE: in SelectT2AddrModeImm7Offset()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1437 case ISD::MSTORE: in SelectT2AddrModeImm7Offset()
|