Searched refs:MVEBU_AP0 (Results 1 – 10 of 10) sorted by relevance
24 #define CCU_GSPMU_CR (MVEBU_CCU_BASE(MVEBU_AP0) \28 #define CCU_HTC_CR (MVEBU_CCU_BASE(MVEBU_AP0) \235 cp110_temp_base = MVEBU_AP_IO_BASE(MVEBU_AP0); in update_cp110_default_win()263 init_io_win(MVEBU_AP0); in ap_init()266 init_ccu(MVEBU_AP0); in ap_init()
23 #define CCU_GSPMU_CR (MVEBU_CCU_BASE(MVEBU_AP0) + \27 #define CCU_HTC_CR (MVEBU_CCU_BASE(MVEBU_AP0) + \231 init_io_win(MVEBU_AP0); in ap_init()234 init_ccu(MVEBU_AP0); in ap_init()
25 #define MASTER_LLC_CTRL LLC_CTRL(MVEBU_AP0)26 #define MASTER_LLC_INV_WAY LLC_INV_WAY(MVEBU_AP0)27 #define MASTER_LLC_TC0_LOCK LLC_TCN_LOCK(MVEBU_AP0, 0)
37 #define CCU_SRAM_WIN_CR CCU_WIN_CR_OFFSET(MVEBU_AP0, 1)
69 if (ccu_is_win_enabled(MVEBU_AP0, win_id)) in bl2_plat_mmap_init()73 ccu_enable_win(MVEBU_AP0, &ccu_mem_map[cfg_idx], win_id); in bl2_plat_mmap_init()84 init_io_win(MVEBU_AP0); in bl2_plat_mmap_init()
189 ccu_restore_win_all(MVEBU_AP0); in ble_plat_mmap_config()191 iow_restore_win_all(MVEBU_AP0); in ble_plat_mmap_config()196 ccu_save_win_all(MVEBU_AP0); in ble_plat_mmap_config()198 iow_save_win_all(MVEBU_AP0); in ble_plat_mmap_config()200 init_ccu(MVEBU_AP0); in ble_plat_mmap_config()202 init_io_win(MVEBU_AP0); in ble_plat_mmap_config()
94 tz_enable_win(MVEBU_AP0, tz_map, win_id); in marvell_bl31_security_setup()
14 #define CCU_HTC_ASET (MVEBU_CCU_BASE(MVEBU_AP0) + 0x264)
14 #define MVEBU_AP0 0x0 macro
60 #define CCU_RGF(win) (MVEBU_CCU_BASE(MVEBU_AP0) + \