Searched refs:MVEBU_COMPHY_REG_BASE (Results 1 – 2 of 2) sorted by relevance
149 reg = mmio_read_32(MVEBU_COMPHY_REG_BASE + COMPHY_SELECTOR_PHY_REG); in mvebu_a3700_comphy_set_phy_selector()192 mmio_write_32(MVEBU_COMPHY_REG_BASE + COMPHY_SELECTOR_PHY_REG, reg); in mvebu_a3700_comphy_set_phy_selector()215 reg = mmio_read_32(MVEBU_COMPHY_REG_BASE + COMPHY_SELECTOR_PHY_REG); in mvebu_a3700_comphy_get_mode()410 offset = MVEBU_COMPHY_REG_BASE + COMPHY_PHY_CFG1_OFFSET(comphy_index); in mvebu_a3700_comphy_sgmii_power_on()536 reg_set(MVEBU_COMPHY_REG_BASE + COMPHY_PHY_CFG1_OFFSET(comphy_index), in mvebu_a3700_comphy_sgmii_power_on()544 ret = polling_with_timeout(MVEBU_COMPHY_REG_BASE + in mvebu_a3700_comphy_sgmii_power_on()555 reg_set(MVEBU_COMPHY_REG_BASE + COMPHY_PHY_CFG1_OFFSET(comphy_index), in mvebu_a3700_comphy_sgmii_power_on()565 reg_set(MVEBU_COMPHY_REG_BASE + COMPHY_PHY_CFG1_OFFSET(comphy_index), in mvebu_a3700_comphy_sgmii_power_on()568 ret = polling_with_timeout(MVEBU_COMPHY_REG_BASE + in mvebu_a3700_comphy_sgmii_power_on()577 ret = polling_with_timeout(MVEBU_COMPHY_REG_BASE + in mvebu_a3700_comphy_sgmii_power_on()[all …]
126 #define MVEBU_COMPHY_REG_BASE (MVEBU_REGS_BASE + 0x18300) macro