Searched refs:MVEBU_REGS_BASE_MASK (Results 1 – 4 of 4) sorted by relevance
44 #define AP_MSS_TIMER_BASE (MVEBU_REGS_BASE_MASK + 0x580110)46 #define AP_MSS_ATF_CORE_0_CTRL_BASE (MVEBU_REGS_BASE_MASK + 0x520140)47 #define AP_MSS_ATF_CORE_1_CTRL_BASE (MVEBU_REGS_BASE_MASK + 0x520150)48 #define AP_MSS_ATF_CORE_2_CTRL_BASE (MVEBU_REGS_BASE_MASK + 0x520160)49 #define AP_MSS_ATF_CORE_3_CTRL_BASE (MVEBU_REGS_BASE_MASK + 0x520170)52 #define AP_MSS_ATF_CORE_0_INFO_BASE (MVEBU_REGS_BASE_MASK + 0x5201C0)53 #define AP_MSS_ATF_CORE_0_INFO_TRACE (MVEBU_REGS_BASE_MASK + 0x5201C4)54 #define AP_MSS_ATF_CORE_1_INFO_BASE (MVEBU_REGS_BASE_MASK + 0x5209C0)55 #define AP_MSS_ATF_CORE_1_INFO_TRACE (MVEBU_REGS_BASE_MASK + 0x5209C4)56 #define AP_MSS_ATF_CORE_2_INFO_BASE (MVEBU_REGS_BASE_MASK + 0x5211C0)[all …]
29 #define MSS_TIMER_BASE (MVEBU_REGS_BASE_MASK + 0x580110)
16 #define IPC_MSG_BASE_MASK MVEBU_REGS_BASE_MASK
29 #define MVEBU_REGS_BASE_MASK 0xF0000000 macro