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Searched refs:NVC3C0_QMDV02_02_DEF (Results 1 – 1 of 1) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/nvc0/
Dqmdc3c0.c26 #define NVC3C0_QMDV02_02_DEF(a...) NVQMD_DEF(NVC3C0, QMDV02_02, ##a) macro
42 NVC3C0_QMDV02_02_DEF(qmd, RUN_CTA_IN_ONE_SM_PARTITION, FALSE, TRUE); in NVC3C0QmdDump_V02_02()
43 NVC3C0_QMDV02_02_DEF(qmd, IS_QUEUE, FALSE, TRUE); in NVC3C0QmdDump_V02_02()
44 NVC3C0_QMDV02_02_DEF(qmd, ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST, FALSE, TRUE); in NVC3C0QmdDump_V02_02()
45 NVC3C0_QMDV02_02_DEF(qmd, SEMAPHORE_RELEASE_ENABLE0, FALSE, TRUE); in NVC3C0QmdDump_V02_02()
46 NVC3C0_QMDV02_02_DEF(qmd, SEMAPHORE_RELEASE_ENABLE1, FALSE, TRUE); in NVC3C0QmdDump_V02_02()
47 NVC3C0_QMDV02_02_DEF(qmd, REQUIRE_SCHEDULING_PCAS, FALSE, TRUE); in NVC3C0QmdDump_V02_02()
48 NVC3C0_QMDV02_02_DEF(qmd, DEPENDENT_QMD_SCHEDULE_ENABLE, FALSE, TRUE); in NVC3C0QmdDump_V02_02()
49 NVC3C0_QMDV02_02_DEF(qmd, DEPENDENT_QMD_TYPE, QUEUE, GRID); in NVC3C0QmdDump_V02_02()
50 NVC3C0_QMDV02_02_DEF(qmd, DEPENDENT_QMD_FIELD_COPY, FALSE, TRUE); in NVC3C0QmdDump_V02_02()
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