Searched refs:NewSrcReg (Results 1 – 7 of 7) sorted by relevance
/external/llvm/lib/Target/X86/ |
D | X86FixupBWInsts.cpp | 249 unsigned NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy() local 254 if (TRI->getSubRegIndex(NewSrcReg, OldSrc.getReg()) != in tryReplaceCopy() 265 .addReg(NewSrcReg, RegState::Undef) in tryReplaceCopy() 270 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg)) in tryReplaceCopy()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86FixupBWInsts.cpp | 319 Register NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy() local 324 if (TRI->getSubRegIndex(NewSrcReg, OldSrc.getReg()) != in tryReplaceCopy() 335 .addReg(NewSrcReg, RegState::Undef) in tryReplaceCopy() 340 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg)) in tryReplaceCopy()
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86FixupBWInsts.cpp | 318 Register NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy() local 323 if (TRI->getSubRegIndex(NewSrcReg, OldSrc.getReg()) != in tryReplaceCopy() 334 .addReg(NewSrcReg, RegState::Undef) in tryReplaceCopy() 339 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg)) in tryReplaceCopy()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPURegisterBankInfo.cpp | 1550 Register NewSrcReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl() local 1551 MRI.setRegBank(NewSrcReg, AMDGPU::SGPRRegBank); in applyMappingImpl() 1552 B.buildZExt(NewSrcReg, MI.getOperand(4).getReg()); in applyMappingImpl() 1553 MI.getOperand(4).setReg(NewSrcReg); in applyMappingImpl()
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D | SIInstrInfo.cpp | 4229 Register NewSrcReg = MRI.createVirtualRegister(VRC); in readlaneVGPRToSGPR() local 4231 get(TargetOpcode::COPY), NewSrcReg) in readlaneVGPRToSGPR() 4233 SrcReg = NewSrcReg; in readlaneVGPRToSGPR()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 844 MCRegister NewSrcReg = RI.get32BitRegister(SrcReg); in copyPhysReg() local 853 .addReg(NewSrcReg, getKillRegState(KillSrc)); in copyPhysReg() 863 copyPhysReg(MBB, MI, DL, NewDestReg, NewSrcReg, KillSrc); in copyPhysReg() 874 .addReg(NewSrcReg, getKillRegState(KillSrc)); in copyPhysReg() 880 .addReg(NewSrcReg) in copyPhysReg() 4718 Register NewSrcReg = MRI.createVirtualRegister(VRC); in readlaneVGPRToSGPR() local 4720 get(TargetOpcode::COPY), NewSrcReg) in readlaneVGPRToSGPR() 4722 SrcReg = NewSrcReg; in readlaneVGPRToSGPR()
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D | AMDGPURegisterBankInfo.cpp | 2188 Register NewSrcReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl() local 2189 MRI.setRegBank(NewSrcReg, AMDGPU::SGPRRegBank); in applyMappingImpl() 2190 B.buildZExt(NewSrcReg, MI.getOperand(4).getReg()); in applyMappingImpl() 2191 MI.getOperand(4).setReg(NewSrcReg); in applyMappingImpl()
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