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Searched refs:NotCC (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp4172 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
4176 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
4181 return DAG.getSetCC(SDLoc(N), VT, LHS, RHS, NotCC); in visitXOR()
4184 N0.getOperand(3), NotCC); in visitXOR()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp7607 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7610 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7615 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7618 N0.getOperand(3), NotCC); in visitXOR()
7625 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp7062 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7065 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7070 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7073 N0.getOperand(3), NotCC); in visitXOR()