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Searched refs:NumCycles (Results 1 – 25 of 49) sorted by relevance

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/external/llvm-project/llvm/tools/llvm-mca/Views/
DDispatchStatistics.cpp42 double Percentage = ((double)Entry.second / NumCycles) * 100.0; in printDispatchHistogram()
53 unsigned NumCycles) { in printStalls() argument
59 double Percentage = ((double)NumStalls / NumCycles) * 100.0; in printStalls()
69 printStalls(SS, HWStalls[HWStallEvent::RegisterFileStall], NumCycles); in printDispatchStalls()
71 printStalls(SS, HWStalls[HWStallEvent::RetireControlUnitStall], NumCycles); in printDispatchStalls()
73 printStalls(SS, HWStalls[HWStallEvent::SchedulerQueueFull], NumCycles); in printDispatchStalls()
75 printStalls(SS, HWStalls[HWStallEvent::LoadQueueFull], NumCycles); in printDispatchStalls()
77 printStalls(SS, HWStalls[HWStallEvent::StoreQueueFull], NumCycles); in printDispatchStalls()
79 printStalls(SS, HWStalls[HWStallEvent::DispatchGroupStall], NumCycles); in printDispatchStalls()
DRetireControlUnitStatistics.cpp21 : NumRetired(0), NumCycles(0), EntriesInUse(0), MaxUsedEntries(0), in RetireControlUnitStatistics()
50 ++NumCycles; in onCycleEnd()
69 << format("%.1f", ((double)Entry.second / NumCycles) * 100.0) in printView()
73 unsigned AvgUsage = (double)SumOfUsedEntries / NumCycles; in printView()
DDispatchStatistics.h46 unsigned NumCycles; variable
66 : NumDispatched(0), NumCycles(0), in DispatchStatistics()
73 void onCycleBegin() override { NumCycles++; } in onCycleBegin()
DSchedulerStatistics.cpp23 NumCycles(0), MostRecentLoadDispatched(~0U), in SchedulerStatistics()
117 << format("%.1f", ((double)IPC / NumCycles) * 100) << "%)\n"; in printSchedulerStats()
124 assert(NumCycles && "Unexpected number of cycles!"); in printSchedulerUsage()
146 double AvgUsage = (double)BU.CumulativeNumUsedSlots / NumCycles; in printSchedulerUsage()
DSchedulerStatistics.h53 unsigned NumCycles; variable
77 void onCycleBegin() override { NumCycles++; } in onCycleBegin()
DRetireControlUnitStatistics.h43 unsigned NumCycles; variable
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DEarlyIfConversion.cpp993 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
994 if (NumCycles > 1) in shouldConvertIf()
995 Cycles += NumCycles - 1; in shouldConvertIf()
1007 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
1008 if (NumCycles > 1) in shouldConvertIf()
1009 TCycle += NumCycles - 1; in shouldConvertIf()
1013 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
1014 if (NumCycles > 1) in shouldConvertIf()
1015 FCycle += NumCycles - 1; in shouldConvertIf()
DIfConversion.cpp1125 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); in ScanInstructions() local
1126 if (NumCycles > 1) in ScanInstructions()
1127 BBI.ExtraCost += NumCycles-1; in ScanInstructions()
2197 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in CopyAndPredicateBlock() local
2198 if (NumCycles > 1) in CopyAndPredicateBlock()
2199 ToBBI.ExtraCost += NumCycles-1; in CopyAndPredicateBlock()
/external/llvm-project/llvm/lib/CodeGen/
DEarlyIfConversion.cpp1084 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
1085 if (NumCycles > 1) in shouldConvertIf()
1086 Cycles += NumCycles - 1; in shouldConvertIf()
1098 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
1099 if (NumCycles > 1) in shouldConvertIf()
1100 TCycle += NumCycles - 1; in shouldConvertIf()
1104 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
1105 if (NumCycles > 1) in shouldConvertIf()
1106 FCycle += NumCycles - 1; in shouldConvertIf()
DIfConversion.cpp1125 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); in ScanInstructions() local
1126 if (NumCycles > 1) in ScanInstructions()
1127 BBI.ExtraCost += NumCycles-1; in ScanInstructions()
2197 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in CopyAndPredicateBlock() local
2198 if (NumCycles > 1) in CopyAndPredicateBlock()
2199 ToBBI.ExtraCost += NumCycles-1; in CopyAndPredicateBlock()
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.h177 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
185 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h210 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
221 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.h233 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
241 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h233 unsigned NumCycles, unsigned ExtraPredCycles,
241 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
243 return NumCycles == 1; in isProfitableToDupForIfCvt()
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.h248 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
256 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
/external/llvm-project/llvm/lib/Target/AMDGPU/
DR600InstrInfo.h184 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
187 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600InstrInfo.h184 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
187 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h127 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
149 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h314 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
325 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h265 unsigned NumCycles, unsigned ExtraPredCycles,
273 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
275 return NumCycles == 1; in isProfitableToDupForIfCvt()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h142 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
164 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h142 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
164 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
/external/llvm-project/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h263 unsigned NumCycles, unsigned ExtraPredCycles,
271 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
273 return NumCycles == 1; in isProfitableToDupForIfCvt()
/external/llvm/lib/CodeGen/
DIfConversion.cpp725 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); in ScanInstructions() local
726 if (NumCycles > 1) in ScanInstructions()
727 BBI.ExtraCost += NumCycles-1; in ScanInstructions()
1670 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in CopyAndPredicateBlock() local
1671 if (NumCycles > 1) in CopyAndPredicateBlock()
1672 ToBBI.ExtraCost += NumCycles-1; in CopyAndPredicateBlock()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h462 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
473 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument

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