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Searched refs:NumIntermediates (Results 1 – 23 of 23) sorted by relevance

/external/llvm-project/llvm/lib/CodeGen/
DTargetLoweringBase.cpp1069 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT() argument
1101 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdownMVT()
1467 unsigned NumIntermediates; in computeRegisterProperties() local
1469 NumIntermediates, RegisterVT, this); in computeRegisterProperties()
1534 unsigned &NumIntermediates, in getVectorTypeBreakdown() argument
1550 NumIntermediates = 1; in getVectorTypeBreakdown()
1571 NumIntermediates = VT.getVectorElementCount().getKnownMinValue() / in getVectorTypeBreakdown()
1578 assert((PartVT.getVectorElementCount() * NumIntermediates) == in getVectorTypeBreakdown()
1583 return NumIntermediates; in getVectorTypeBreakdown()
1601 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdown()
/external/tensorflow/tensorflow/lite/kernels/
Dkernel_util.h156 inline int NumIntermediates(const TfLiteNode* node) { in NumIntermediates() function
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp938 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT() argument
961 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdownMVT()
1312 unsigned NumIntermediates; in computeRegisterProperties() local
1314 NumIntermediates, RegisterVT, this); in computeRegisterProperties()
1377 unsigned &NumIntermediates, in getVectorTypeBreakdown() argument
1392 NumIntermediates = 1; in getVectorTypeBreakdown()
1417 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdown()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp1116 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT() argument
1139 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdownMVT()
1439 unsigned NumIntermediates; in computeRegisterProperties() local
1441 NumIntermediates, RegisterVT, this); in computeRegisterProperties()
1502 unsigned &NumIntermediates, in getVectorTypeBreakdown() argument
1517 NumIntermediates = 1; in getVectorTypeBreakdown()
1542 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdown()
/external/llvm/include/llvm/Target/
DTargetLowering.h537 unsigned &NumIntermediates,
843 unsigned NumIntermediates; in getRegisterType() local
845 NumIntermediates, RegisterVT); in getRegisterType()
871 unsigned NumIntermediates; in getNumRegisters() local
872 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2); in getNumRegisters()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetLowering.h830 unsigned &NumIntermediates,
838 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
839 return getVectorTypeBreakdown(Context, VT, IntermediateVT, NumIntermediates, in getVectorTypeBreakdownForCallingConv()
1292 unsigned NumIntermediates; in getRegisterType() local
1294 NumIntermediates, RegisterVT); in getRegisterType()
1320 unsigned NumIntermediates; in getNumRegisters() local
1321 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2); in getNumRegisters()
/external/llvm-project/llvm/include/llvm/CodeGen/
DTargetLowering.h965 unsigned &NumIntermediates,
973 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
974 return getVectorTypeBreakdown(Context, VT, IntermediateVT, NumIntermediates, in getVectorTypeBreakdownForCallingConv()
1448 unsigned NumIntermediates; in getRegisterType() local
1450 NumIntermediates, RegisterVT); in getRegisterType()
1476 unsigned NumIntermediates; in getNumRegisters() local
1477 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2); in getNumRegisters()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp376 unsigned NumIntermediates; in getCopyFromPartsVector() local
382 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
386 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
397 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyFromPartsVector()
398 if (NumIntermediates == NumParts) { in getCopyFromPartsVector()
407 assert(NumParts % NumIntermediates == 0 && in getCopyFromPartsVector()
409 unsigned Factor = NumParts / NumIntermediates; in getCopyFromPartsVector()
410 for (unsigned i = 0; i != NumIntermediates; ++i) in getCopyFromPartsVector()
421 : NumIntermediates)); in getCopyFromPartsVector()
710 unsigned NumIntermediates; in getCopyToPartsVector() local
[all …]
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp341 unsigned NumIntermediates; in getCopyFromPartsVector() local
347 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
351 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
362 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyFromPartsVector()
363 if (NumIntermediates == NumParts) { in getCopyFromPartsVector()
372 assert(NumParts % NumIntermediates == 0 && in getCopyFromPartsVector()
374 unsigned Factor = NumParts / NumIntermediates; in getCopyFromPartsVector()
375 for (unsigned i = 0; i != NumIntermediates; ++i) in getCopyFromPartsVector()
389 NumIntermediates); in getCopyFromPartsVector()
689 unsigned NumIntermediates; in getCopyToPartsVector() local
[all …]
DSelectionDAG.cpp2064 unsigned NumIntermediates; in getReducedAlign() local
2066 NumIntermediates, RegisterVT); in getReducedAlign()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp288 unsigned NumIntermediates; in getCopyFromPartsVector() local
291 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
300 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyFromPartsVector()
301 if (NumIntermediates == NumParts) { in getCopyFromPartsVector()
310 assert(NumParts % NumIntermediates == 0 && in getCopyFromPartsVector()
312 unsigned Factor = NumParts / NumIntermediates; in getCopyFromPartsVector()
313 for (unsigned i = 0; i != NumIntermediates; ++i) in getCopyFromPartsVector()
574 unsigned NumIntermediates; in getCopyToPartsVector() local
577 NumIntermediates, RegisterVT); in getCopyToPartsVector()
585 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyToPartsVector()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.h37 unsigned &NumIntermediates, MVT &RegisterVT) const override;
DSIISelLowering.cpp846 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
854 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
855 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
861 NumIntermediates = NumElts * ((Size + 31) / 32); in getVectorTypeBreakdownForCallingConv()
862 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
871 NumIntermediates = (NumElts + 1) / 2; in getVectorTypeBreakdownForCallingConv()
872 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
877 Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
/external/llvm-project/llvm/lib/Target/Mips/
DMipsISelLowering.h302 unsigned &NumIntermediates, MVT &RegisterVT) const override;
DMipsISelLowering.cpp133 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
137 NumIntermediates = VT.getFixedSizeInBits() < RegisterVT.getFixedSizeInBits() in getVectorTypeBreakdownForCallingConv()
141 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsISelLowering.h304 unsigned &NumIntermediates, MVT &RegisterVT) const override;
DMipsISelLowering.cpp133 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
137 NumIntermediates = VT.getSizeInBits() < RegisterVT.getSizeInBits() in getVectorTypeBreakdownForCallingConv()
141 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIISelLowering.h37 unsigned &NumIntermediates, MVT &RegisterVT) const override;
DSIISelLowering.cpp970 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
981 NumIntermediates = (NumElts + 1) / 2; in getVectorTypeBreakdownForCallingConv()
982 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
988 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
989 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
996 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
997 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1004 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
1005 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1011 NumIntermediates = NumElts * ((Size + 31) / 32); in getVectorTypeBreakdownForCallingConv()
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h1377 unsigned &NumIntermediates, MVT &RegisterVT) const override;
DX86ISelLowering.cpp2153 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
2162 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
2163 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
2171 NumIntermediates = 2; in getVectorTypeBreakdownForCallingConv()
2176 NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h1248 unsigned &NumIntermediates, MVT &RegisterVT) const override;
DX86ISelLowering.cpp2138 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
2147 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
2148 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
2156 NumIntermediates = 2; in getVectorTypeBreakdownForCallingConv()
2161 NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()