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Searched refs:OPERAND_COND_CODE (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h70 OPERAND_COND_CODE, enumerator
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h75 OPERAND_COND_CODE, enumerator
/external/llvm-project/llvm/tools/llvm-exegesis/lib/X86/
DTarget.cpp890 case X86::OperandType::OPERAND_COND_CODE: { in generateInstructionVariants()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.td621 let OperandType = "OPERAND_COND_CODE";
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrInfo.td641 let OperandType = "OPERAND_COND_CODE";
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenInstrInfo.inc16816 … X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };
16817 … }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };
16818 … X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };
16819 … }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };
16820 … X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };
16821 … }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };
16889 …{ -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };
16993 … X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };
16994 … = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, };