Searched refs:OP_LOAD (Results 1 – 18 of 18) sorted by relevance
/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_target_nvc0.cpp | 393 && i->op != OP_LOAD) in insnCanLoad() 445 (insn->op != OP_LOAD || insn->subOp != NV50_IR_SUBOP_LDC_IS)) in insnCanLoadOffset() 579 case OP_LOAD: in getLatency() 593 if (i->op == OP_LOAD) { in getLatency()
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D | nv50_ir_target_gm107.cpp | 311 case OP_LOAD: in getReadLatency()
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D | nv50_ir_target_nv50.cpp | 400 if (i->op == OP_LOAD || i->op == OP_STORE) { in insnCanLoadOffset() 517 if (i->op == OP_LOAD) { in getLatency()
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D | nv50_ir_peephole.cpp | 165 return ld && ld->op == OP_LOAD && ld->src(0).getFile() == FILE_MEMORY_CONST; in isCSpaceLoad() 185 (ld->op == OP_LOAD && in isAttribOrSharedLoad() 277 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV)) in visit() 2930 if (insn->op == OP_LOAD || insn->op == OP_VFETCH) in getList() 2956 if (it->locked && insn->op != OP_LOAD && insn->op != OP_VFETCH) in findRecord() 3162 if (ldst->op == OP_LOAD || ldst->op == OP_VFETCH) { in runOpt() 3281 if (ld->op != OP_MOV && ld->op != OP_LOAD) in isConstantCondition() 3428 ((insn->op != OP_LOAD && insn->op != OP_STORE && insn->op != OP_ATOM) || in visit() 3744 if (op == OP_LOAD || op == OP_VFETCH || op == OP_ATOM) { in isResultEqual() 3921 (i->op == OP_VFETCH || i->op == OP_LOAD)) { in visit() [all …]
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D | nv50_ir_lowering_gm107.cpp | 86 case OP_LOAD: in visit()
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D | nv50_ir_ra.cpp | 1752 ld = new_Instruction(func, OP_LOAD, ty); in unspill() 1761 Instruction *l = new_Instruction(func, OP_LOAD, TYPE_U32); in unspill() 2563 if (i->op == OP_LOAD || i->op == OP_VFETCH) { in visit() 2590 bool load = defi->op == OP_LOAD && in insertConstraintMove() 2612 mov->op = OP_LOAD; in insertConstraintMove()
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D | nv50_ir_lowering_gv100.cpp | 311 case OP_LOAD: in visit()
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D | nv50_ir_print.cpp | 639 case OP_LOAD: in print()
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D | nv50_ir_build_util.cpp | 109 Instruction *insn = new_Instruction(func, OP_LOAD, ty); in mkLoad()
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D | nv50_ir_target_gv100.cpp | 295 case OP_LOAD: in getOpInfo()
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D | nv50_ir_lowering_nv50.cpp | 1187 bld.mkOp1(OP_LOAD, TYPE_U16, x, in handleRDSV() 1429 case OP_LOAD: in visit()
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D | nv50_ir.h | 50 OP_LOAD, enumerator
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D | nv50_ir_lowering_nvc0.cpp | 55 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV) || in handleDIV() 855 if (i->op == OP_LOAD && i->subOp == NV50_IR_SUBOP_LDC_IS) { in visit() 3252 case OP_LOAD: in visit()
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D | nv50_ir_emit_gv100.cpp | 1809 case OP_LOAD: in emitInstruction()
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D | nv50_ir_emit_nv50.cpp | 1868 case OP_LOAD: in emitInstruction()
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D | nv50_ir_emit_gk110.cpp | 2517 case OP_LOAD: in emitInstruction()
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D | nv50_ir_emit_nvc0.cpp | 2693 case OP_LOAD: in emitInstruction()
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D | nv50_ir_emit_gm107.cpp | 3629 case OP_LOAD: in emitInstruction()
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