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Searched refs:OP_SET_AND (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_inlines.h286 if (op >= OP_SET_AND && op <= OP_SLCT && op != OP_SELP) in asCmp()
293 if (op >= OP_SET_AND && op <= OP_SLCT && op != OP_SELP) in asCmp()
Dnv50_ir_target_gv100.cpp36 OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT in initOpInfo()
344 case OP_SET_AND: in getOpInfo()
451 op == OP_SET_AND || in isOpSupported()
Dnv50_ir_target_gm107.cpp230 case OP_SET_AND: in getLatency()
Dnv50_ir_target_nv50.cpp117 OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT in initOpInfo()
435 case OP_SET_AND: in isOpSupported()
Dnv50_ir_emit_gv100.cpp481 case OP_SET_AND: emitField(74, 2, 0); break; in emitFSET_BF()
506 case OP_SET_AND: emitField(74, 2, 0); break; in emitFSETP()
608 case OP_SET_AND: emitField(74, 2, 0); break; in emitDSETP()
701 case OP_SET_AND: emitField(74, 2, 0); break; in emitISETP()
1880 case OP_SET_AND: in emitInstruction()
Dnv50_ir_target_nvc0.cpp141 { OP_SET_AND, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
199 OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT in initOpInfo()
Dnv50_ir_emit_gm107.cpp1203 case OP_SET_AND: emitField(0x2d, 2, 0); break; in emitDSET()
1251 case OP_SET_AND: emitField(0x2d, 2, 0); break; in emitDSETP()
1590 case OP_SET_AND: emitField(0x2d, 2, 0); break; in emitFSET()
1639 case OP_SET_AND: emitField(0x2d, 2, 0); break; in emitFSETP()
2089 case OP_SET_AND: emitField(0x2d, 2, 0); break; in emitISET()
2135 case OP_SET_AND: emitField(0x2d, 2, 0); break; in emitISETP()
3579 case OP_SET_AND: in emitInstruction()
Dnv50_ir_lowering_gv100.cpp267 case OP_SET_AND: in visit()
Dnv50_ir.h81 OP_SET_AND, // dst = (src0 CMP src1) & src2 enumerator
Dnv50_ir_peephole.cpp237 if (insn->op == OP_SET || insn->op == OP_SET_AND || in checkSwapSrc01()
2037 operation redOp = (logop->op == OP_AND ? OP_SET_AND : in handleLOGOP()
2042 set0->op != OP_SET_AND && in handleLOGOP()
2316 if ((set->op == OP_SET || set->op == OP_SET_AND || in handleNEG()
Dnv50_ir_emit_gk110.cpp1175 case OP_SET_AND: code[1] |= 0x0 << 16; break; in emitSET()
2598 case OP_SET_AND: in emitInstruction()
Dnv50_ir_emit_nvc0.cpp1190 case OP_SET_AND: hi = 0x10000000; break; in emitSET()
2768 case OP_SET_AND: in emitInstruction()
Dnv50_ir_lowering_nvc0.cpp359 case OP_SET_AND: in visit()