/external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
D | fd2_emit.c | 88 OUT_RING(ring, base); in emit_constants() 90 OUT_RING(ring, *(dwords++)); in emit_constants() 100 OUT_RING(ring, start_base + (4 * (shader->first_immediate + i))); in emit_constants() 101 OUT_RING(ring, shader->immediates[i].val[0]); in emit_constants() 102 OUT_RING(ring, shader->immediates[i].val[1]); in emit_constants() 103 OUT_RING(ring, shader->immediates[i].val[2]); in emit_constants() 104 OUT_RING(ring, shader->immediates[i].val[3]); in emit_constants() 136 OUT_RING(ring, 0x00010000 + (0x6 * const_idx)); in emit_texture() 138 OUT_RING(ring, sampler->tex0 | view->tex0); in emit_texture() 142 OUT_RING(ring, 0); in emit_texture() [all …]
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D | fd2_draw.c | 50 OUT_RING(ring, CACHE_FLUSH); in emit_cacheflush() 86 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET)); in draw_impl() 87 OUT_RING(ring, info->index_size ? 0 : info->start); in draw_impl() 90 OUT_RING(ring, A2XX_TC_CNTL_STATUS_L2_INVALIDATE); in draw_impl() 102 OUT_RING(ring, 0x000005d0); /* RBBM_STATUS */ in draw_impl() 103 OUT_RING(ring, 0x00000000); in draw_impl() 104 OUT_RING(ring, 0x00001000); /* bit: 12: VGT_BUSY_NO_DMA */ in draw_impl() 105 OUT_RING(ring, 0x00000001); in draw_impl() 108 OUT_RING(ring, 0x00000000); in draw_impl() 109 OUT_RING(ring, 0x0003c004); in draw_impl() [all …]
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D | fd2_gmem.c | 104 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_INFO)); in emit_gmem2mem_surf() 105 OUT_RING(ring, A2XX_RB_COLOR_INFO_BASE(base) | in emit_gmem2mem_surf() 109 OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL)); in emit_gmem2mem_surf() 110 OUT_RING(ring, 0x00000000); /* RB_COPY_CONTROL */ in emit_gmem2mem_surf() 112 OUT_RING(ring, pitch >> 5); /* RB_COPY_DEST_PITCH */ in emit_gmem2mem_surf() 113 OUT_RING(ring, /* RB_COPY_DEST_INFO */ in emit_gmem2mem_surf() 125 OUT_RING(ring, CP_REG(REG_A2XX_VGT_MAX_VTX_INDX)); in emit_gmem2mem_surf() 126 OUT_RING(ring, 3); /* VGT_MAX_VTX_INDX */ in emit_gmem2mem_surf() 127 OUT_RING(ring, 0); /* VGT_MIN_VTX_INDX */ in emit_gmem2mem_surf() 152 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_OFFSET)); in prepare_tile_fini_ib() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
D | fd5_emit.c | 65 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd5_emit_const_user() 69 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_const_user() 71 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_const_user() 73 OUT_RING(ring, ((uint32_t *)dwords)[i]); in fd5_emit_const_user() 88 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(dst_off) | in fd5_emit_const_bo() 106 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd5_emit_const_ptrs() 110 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_const_ptrs() 112 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_const_ptrs() 118 OUT_RING(ring, 0xbad00000 | (i << 16)); in fd5_emit_const_ptrs() 119 OUT_RING(ring, 0xbad00000 | (i << 16)); in fd5_emit_const_ptrs() [all …]
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D | fd5_gmem.c | 100 OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 105 OUT_RING(ring, A5XX_RB_MRT_PITCH(stride)); in emit_mrt() 106 OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(size)); in emit_mrt() 108 OUT_RING(ring, base); /* RB_MRT[i].BASE_LO */ in emit_mrt() 109 OUT_RING(ring, 0x00000000); /* RB_MRT[i].BASE_HI */ in emit_mrt() 116 OUT_RING(ring, A5XX_SP_FS_MRT_REG_COLOR_FORMAT(format) | in emit_mrt() 125 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_LO */ in emit_mrt() 126 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_HI */ in emit_mrt() 127 OUT_RING(ring, A5XX_RB_MRT_FLAG_BUFFER_PITCH(0)); in emit_mrt() 128 OUT_RING(ring, A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(0)); in emit_mrt() [all …]
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D | fd5_blitter.c | 157 OUT_RING(ring, 0x00000008); in emit_setup() 160 OUT_RING(ring, 0x86000000); /* UNKNOWN_2100 */ in emit_setup() 163 OUT_RING(ring, 0x86000000); /* UNKNOWN_2180 */ in emit_setup() 166 OUT_RING(ring, 0x00000009); /* UNKNOWN_2184 */ in emit_setup() 169 OUT_RING(ring, A5XX_RB_CNTL_BYPASS); in emit_setup() 172 OUT_RING(ring, 0x00000004); /* RB_MODE_CNTL */ in emit_setup() 175 OUT_RING(ring, 0x0000000c); /* SP_MODE_CNTL */ in emit_setup() 178 OUT_RING(ring, 0x00000344); /* TPL1_MODE_CNTL */ in emit_setup() 181 OUT_RING(ring, 0x00000002); /* HLSQ_MODE_CNTL */ in emit_setup() 184 OUT_RING(ring, 0x00000181); /* GRAS_CL_CNTL */ in emit_setup() [all …]
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D | fd5_program.c | 62 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(0) | in fd5_emit_shader() 67 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_shader() 69 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_shader() 81 OUT_RING(ring, bin[i]); in fd5_emit_shader() 179 OUT_RING(ring, REG_A5XX_VPC_SO_BUF_CNTL); in emit_stream_out() 180 OUT_RING(ring, A5XX_VPC_SO_BUF_CNTL_ENABLE | in emit_stream_out() 185 OUT_RING(ring, REG_A5XX_VPC_SO_NCOMP(0)); in emit_stream_out() 186 OUT_RING(ring, ncomp[0]); in emit_stream_out() 187 OUT_RING(ring, REG_A5XX_VPC_SO_NCOMP(1)); in emit_stream_out() 188 OUT_RING(ring, ncomp[1]); in emit_stream_out() [all …]
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D | fd5_compute.c | 97 OUT_RING(ring, 0x00000000); /* SP_SP_CNTL */ in cs_program_emit() 100 OUT_RING(ring, A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(TWO_QUADS) | in cs_program_emit() 105 OUT_RING(ring, A5XX_SP_CS_CTRL_REG0_THREADSIZE(thrsz) | in cs_program_emit() 112 OUT_RING(ring, A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(0) | in cs_program_emit() 117 OUT_RING(ring, A5XX_HLSQ_CS_CNTL_INSTRLEN(instrlen) | in cs_program_emit() 121 OUT_RING(ring, A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET(0) | in cs_program_emit() 128 OUT_RING(ring, constlen); /* HLSQ_CS_CONSTLEN */ in cs_program_emit() 129 OUT_RING(ring, instrlen); /* HLSQ_CS_INSTRLEN */ in cs_program_emit() 135 OUT_RING(ring, 0x1f00000); in cs_program_emit() 142 OUT_RING(ring, A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID(work_group_id) | in cs_program_emit() [all …]
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D | fd5_image.c | 125 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) | in emit_image_tex() 129 OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_CONSTANTS) | in emit_image_tex() 131 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in emit_image_tex() 133 OUT_RING(ring, A5XX_TEX_CONST_0_FMT(img->fmt) | in emit_image_tex() 137 OUT_RING(ring, A5XX_TEX_CONST_1_WIDTH(img->width) | in emit_image_tex() 139 OUT_RING(ring, A5XX_TEX_CONST_2_TYPE(img->type) | in emit_image_tex() 141 OUT_RING(ring, A5XX_TEX_CONST_3_ARRAY_PITCH(img->array_pitch)); in emit_image_tex() 146 OUT_RING(ring, 0x00000000); in emit_image_tex() 147 OUT_RING(ring, A5XX_TEX_CONST_5_DEPTH(img->depth)); in emit_image_tex() 149 OUT_RING(ring, 0x00000000); in emit_image_tex() [all …]
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D | fd5_draw.c | 56 OUT_RING(ring, info->index_size ? info->index_bias : info->start); /* VFD_INDEX_OFFSET */ in draw_impl() 57 OUT_RING(ring, info->start_instance); /* VFD_INSTANCE_START_OFFSET */ in draw_impl() 60 OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */ in draw_impl() 165 OUT_RING(ring, FLUSH_SO_0 + i); in fd5_draw_vbo() 198 OUT_RING(ring, 0x10000000); in fd5_clear_lrz() 201 OUT_RING(ring, 0x20fffff); in fd5_clear_lrz() 204 OUT_RING(ring, A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(0.0) | in fd5_clear_lrz() 208 OUT_RING(ring, 0x00000000); in fd5_clear_lrz() 211 OUT_RING(ring, 0x00000181); in fd5_clear_lrz() 214 OUT_RING(ring, 0x00000000); in fd5_clear_lrz() [all …]
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D | fd5_emit.h | 109 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_LO */ in fd5_cache_flush() 110 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_HI */ in fd5_cache_flush() 111 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_LO */ in fd5_cache_flush() 112 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_HI */ in fd5_cache_flush() 113 OUT_RING(ring, 0x00000012); /* UCHE_CACHE_INVALIDATE */ in fd5_cache_flush() 124 OUT_RING(ring, CP_SET_RENDER_MODE_0_MODE(mode)); in fd5_set_render_mode() 125 OUT_RING(ring, 0x00000000); /* ADDR_LO */ in fd5_set_render_mode() 126 OUT_RING(ring, 0x00000000); /* ADDR_HI */ in fd5_set_render_mode() 127 OUT_RING(ring, COND(mode == GMEM, CP_SET_RENDER_MODE_3_GMEM_ENABLE) | in fd5_set_render_mode() 129 OUT_RING(ring, 0x00000000); in fd5_set_render_mode() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
D | fd4_emit.c | 62 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd4_emit_const_user() 66 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd4_emit_const_user() 69 OUT_RING(ring, dwords[i]); in fd4_emit_const_user() 85 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(dst_off) | in fd4_emit_const_bo() 103 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd4_emit_const_ptrs() 107 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd4_emit_const_ptrs() 114 OUT_RING(ring, 0xbad00000 | (i << 16)); in fd4_emit_const_ptrs() 119 OUT_RING(ring, 0xffffffff); in fd4_emit_const_ptrs() 162 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(0) | in emit_textures() 166 OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_SHADER) | in emit_textures() [all …]
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D | fd4_gmem.c | 111 OUT_RING(ring, A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 117 OUT_RING(ring, base); in emit_mrt() 118 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(stride)); in emit_mrt() 125 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(0)); in emit_mrt() 171 OUT_RING(ring, A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) | in emit_gmem2mem_surf() 175 OUT_RING(ring, A4XX_RB_COPY_DEST_PITCH_PITCH(pitch)); in emit_gmem2mem_surf() 176 OUT_RING(ring, A4XX_RB_COPY_DEST_INFO_TILE(TILE4_LINEAR) | in emit_gmem2mem_surf() 200 OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_NEVER)); in fd4_emit_tile_gmem2mem() 203 OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_NEVER) | in fd4_emit_tile_gmem2mem() 211 OUT_RING(ring, 0x00000000); /* RB_STENCIL_CONTROL2 */ in fd4_emit_tile_gmem2mem() [all …]
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D | fd4_program.c | 59 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(0) | in emit_shader() 64 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in emit_shader() 77 OUT_RING(ring, bin[i]); in emit_shader() 220 OUT_RING(ring, 0x00000003); in fd4_program_emit() 223 OUT_RING(ring, A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(fssz) | in fd4_program_emit() 232 OUT_RING(ring, A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(TWO_QUADS) | in fd4_program_emit() 236 OUT_RING(ring, A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(63) | in fd4_program_emit() 240 OUT_RING(ring, A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(ij_regid[IJ_PERSP_PIXEL]) | in fd4_program_emit() 244 OUT_RING(ring, 0x00fcfcfc); /* XXX HLSQ_CONTROL_4 */ in fd4_program_emit() 247 OUT_RING(ring, A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(s[VS].constlen) | in fd4_program_emit() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
D | fd3_gmem.c | 109 OUT_RING(ring, A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 115 OUT_RING(ring, A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(base)); in emit_mrt() 121 OUT_RING(ring, COND((i < nr_bufs) && bufs[i], in emit_mrt() 173 OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RESOLVE_PASS) | in emit_binning_workaround() 176 OUT_RING(ring, A3XX_RB_RENDER_CONTROL_BIN_WIDTH(32) | in emit_binning_workaround() 181 OUT_RING(ring, A3XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) | in emit_binning_workaround() 185 OUT_RING(ring, A3XX_RB_COPY_DEST_PITCH_PITCH(128)); in emit_binning_workaround() 186 OUT_RING(ring, A3XX_RB_COPY_DEST_INFO_TILE(LINEAR) | in emit_binning_workaround() 193 OUT_RING(ring, A3XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RESOLVE_PASS) | in emit_binning_workaround() 201 OUT_RING(ring, A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(FOUR_QUADS) | in emit_binning_workaround() [all …]
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D | fd3_emit.c | 67 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | in fd3_emit_const_user() 71 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in fd3_emit_const_user() 74 OUT_RING(ring, dwords[i]); in fd3_emit_const_user() 94 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(dst_off) | in fd3_emit_const_bo() 112 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | in fd3_emit_const_ptrs() 116 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in fd3_emit_const_ptrs() 123 OUT_RING(ring, 0xbad00000 | (i << 16)); in fd3_emit_const_ptrs() 128 OUT_RING(ring, 0xffffffff); in fd3_emit_const_ptrs() 174 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(tex_off[sb]) | in emit_textures() 178 OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER) | in emit_textures() [all …]
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D | fd3_program.c | 80 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) | in emit_shader() 85 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in emit_shader() 92 OUT_RING(ring, bin[i]); in emit_shader() 194 OUT_RING(ring, A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(FOUR_QUADS) | in fd3_program_emit() 203 OUT_RING(ring, A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(TWO_QUADS) | in fd3_program_emit() 207 OUT_RING(ring, A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(31) | in fd3_program_emit() 209 OUT_RING(ring, in fd3_program_emit() 214 OUT_RING(ring, A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(vp->constlen) | in fd3_program_emit() 217 OUT_RING(ring, A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(fp->constlen) | in fd3_program_emit() 222 OUT_RING(ring, A3XX_SP_SP_CTRL_REG_CONSTMODE(constmode) | in fd3_program_emit() [all …]
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/external/mesa3d/src/freedreno/computerator/ |
D | a6xx.c | 121 OUT_RING(ring, A6XX_SP_MODE_CONTROL_CONSTANT_DEMOTION_ENABLE | 4); in cs_program_emit() 124 OUT_RING(ring, A6XX_HLSQ_INVALIDATE_CMD_VS_STATE | in cs_program_emit() 135 OUT_RING(ring, A6XX_HLSQ_CS_CNTL_CONSTLEN(constlen) | in cs_program_emit() 139 OUT_RING(ring, A6XX_SP_CS_CONFIG_ENABLED | in cs_program_emit() 143 OUT_RING(ring, v->instrlen); /* SP_VS_INSTRLEN */ in cs_program_emit() 146 OUT_RING(ring, A6XX_SP_CS_CTRL_REG0_THREADSIZE(thrsz) | in cs_program_emit() 154 OUT_RING(ring, 0x41); in cs_program_emit() 161 OUT_RING(ring, A6XX_HLSQ_CS_CNTL_0_WGIDCONSTID(work_group_id) | in cs_program_emit() 165 OUT_RING(ring, 0x2fc); /* HLSQ_CS_UNKNOWN_B998 */ in cs_program_emit() 171 OUT_RING(ring, v->instrlen); in cs_program_emit() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
D | fd6_blitter.c | 248 OUT_RING(ring, A6XX_RB_CCU_CNTL_OFFSET(screen->info.a6xx.ccu_offset_bypass)); in emit_setup() 260 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE)); in emit_blit_setup() 274 OUT_RING(ring, blit_cntl); in emit_blit_setup() 277 OUT_RING(ring, blit_cntl); in emit_blit_setup() 287 OUT_RING(ring, A6XX_SP_2D_DST_FORMAT_COLOR_FORMAT(fmt) | in emit_blit_setup() 303 OUT_RING(ring, 0); in emit_blit_setup() 376 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(FMT6_8_UNORM) | in emit_blit_buffer() 380 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift + w) | in emit_blit_buffer() 383 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p)); in emit_blit_buffer() 385 OUT_RING(ring, 0x00000000); in emit_blit_buffer() [all …]
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D | fd6_image.c | 173 OUT_RING(ring, fd6_tex_const_0(img->prsc, img->level, img->pfmt, in emit_image_tex() 176 OUT_RING(ring, A6XX_TEX_CONST_1_WIDTH(img->width) | in emit_image_tex() 178 OUT_RING(ring, in emit_image_tex() 182 OUT_RING(ring, A6XX_TEX_CONST_3_ARRAY_PITCH(img->array_pitch) | in emit_image_tex() 189 OUT_RING(ring, 0x00000000); in emit_image_tex() 190 OUT_RING(ring, A6XX_TEX_CONST_5_DEPTH(img->depth)); in emit_image_tex() 193 OUT_RING(ring, 0x00000000); /* texconst6 */ in emit_image_tex() 200 OUT_RING(ring, A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(rsc->layout.ubwc_layer_size >> 2)); in emit_image_tex() 201 OUT_RING(ring, in emit_image_tex() 206 OUT_RING(ring, 0x00000000); /* texconst7 */ in emit_image_tex() [all …]
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D | fd6_program.c | 99 OUT_RING(ring, so->instrlen); in fd6_emit_shader() 105 OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) | in fd6_emit_shader() 213 OUT_RING(ring, REG_A6XX_VPC_SO_STREAM_CNTL); in setup_stream_out() 214 OUT_RING(ring, A6XX_VPC_SO_STREAM_CNTL_STREAM_ENABLE(0x1) | in setup_stream_out() 219 OUT_RING(ring, REG_A6XX_VPC_SO_NCOMP(0)); in setup_stream_out() 220 OUT_RING(ring, ncomp[0]); in setup_stream_out() 221 OUT_RING(ring, REG_A6XX_VPC_SO_NCOMP(1)); in setup_stream_out() 222 OUT_RING(ring, ncomp[1]); in setup_stream_out() 223 OUT_RING(ring, REG_A6XX_VPC_SO_NCOMP(2)); in setup_stream_out() 224 OUT_RING(ring, ncomp[2]); in setup_stream_out() [all …]
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D | fd6_compute.c | 94 OUT_RING(ring, A6XX_HLSQ_CS_CNTL_CONSTLEN(v->constlen) | in cs_program_emit() 98 OUT_RING(ring, A6XX_SP_CS_CONFIG_ENABLED | in cs_program_emit() 103 OUT_RING(ring, v->instrlen); /* SP_VS_INSTRLEN */ in cs_program_emit() 106 OUT_RING(ring, A6XX_SP_CS_CTRL_REG0_THREADSIZE(thrsz) | in cs_program_emit() 114 OUT_RING(ring, 0x41); in cs_program_emit() 121 OUT_RING(ring, A6XX_HLSQ_CS_CNTL_0_WGIDCONSTID(work_group_id) | in cs_program_emit() 125 OUT_RING(ring, 0x2fc); /* HLSQ_CS_UNKNOWN_B998 */ in cs_program_emit() 171 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_COMPUTE)); in fd6_launch_grid() 178 OUT_RING(ring, A6XX_HLSQ_CS_NDRANGE_0_KERNELDIM(work_dim) | in fd6_launch_grid() 182 OUT_RING(ring, A6XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X(local_size[0] * num_groups[0])); in fd6_launch_grid() [all …]
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D | fd6_gmem.c | 62 OUT_RING(ring, in fd6_emit_flag_reference() 66 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_LO */ in fd6_emit_flag_reference() 67 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_HI */ in fd6_emit_flag_reference() 68 OUT_RING(ring, 0x00000000); in fd6_emit_flag_reference() 203 OUT_RING(ring, 0x00000000); in emit_zs() 204 OUT_RING(ring, 0x00000000); in emit_zs() 205 OUT_RING(ring, 0x00000000); /* GRAS_LRZ_BUFFER_PITCH */ in emit_zs() 206 OUT_RING(ring, 0x00000000); /* GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_LO */ in emit_zs() 207 OUT_RING(ring, 0x00000000); in emit_zs() 214 OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(UNK_25)); in emit_zs() [all …]
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D | fd6_emit.c | 260 OUT_RING(state, texconst0); in fd6_emit_fb_tex() 261 OUT_RING(state, A6XX_TEX_CONST_1_WIDTH(pfb->width) | in fd6_emit_fb_tex() 265 OUT_RING(state, A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size)); in fd6_emit_fb_tex() 267 OUT_RING(state, A6XX_TEX_CONST_4_BASE_LO(ctx->screen->gmem_base)); in fd6_emit_fb_tex() 268 OUT_RING(state, A6XX_TEX_CONST_5_BASE_HI(ctx->screen->gmem_base >> 32) | in fd6_emit_fb_tex() 270 OUT_RING(state, 0); /* texconst6 */ in fd6_emit_fb_tex() 271 OUT_RING(state, 0); /* texconst7 */ in fd6_emit_fb_tex() 272 OUT_RING(state, 0); /* texconst8 */ in fd6_emit_fb_tex() 273 OUT_RING(state, 0); /* texconst9 */ in fd6_emit_fb_tex() 274 OUT_RING(state, 0); /* texconst10 */ in fd6_emit_fb_tex() [all …]
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D | fd6_draw.c | 291 OUT_RING(ring, index_start); /* VFD_INDEX_OFFSET */ in fd6_draw_vbo() 297 OUT_RING(ring, info->start_instance); /* VFD_INSTANCE_START_OFFSET */ in fd6_draw_vbo() 304 OUT_RING(ring, restart_index); /* PC_RESTART_INDEX */ in fd6_draw_vbo() 352 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BYPASS)); in fd6_clear_lrz() 375 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE)); in fd6_clear_lrz() 379 OUT_RING(ring, 0x0); in fd6_clear_lrz() 382 OUT_RING(ring, 0x00000000); in fd6_clear_lrz() 383 OUT_RING(ring, 0x00000000); in fd6_clear_lrz() 384 OUT_RING(ring, 0x00000000); in fd6_clear_lrz() 385 OUT_RING(ring, 0x00000000); in fd6_clear_lrz() [all …]
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