Searched refs:OffsetDiff (Results 1 – 10 of 10) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULowerKernelArguments.cpp | 130 int64_t OffsetDiff = EltOffset - AlignDownOffset; in runOnFunction() local
203 Value *ExtractBits = OffsetDiff == 0 ? in runOnFunction()
204 Load : Builder.CreateLShr(Load, OffsetDiff * 8); in runOnFunction()
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| D | SILoadStoreOptimizer.cpp | 790 unsigned OffsetDiff = std::abs((int)EltOffset1 - (int)EltOffset0); in offsetsCanBeCombined() local
793 if ((OffsetDiff % 64 == 0) && isUInt<8>(OffsetDiff / 64)) { in offsetsCanBeCombined()
800 if (isUInt<8>(OffsetDiff)) { in offsetsCanBeCombined()
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| D | SIISelLowering.cpp | 1482 int64_t OffsetDiff = Offset - AlignDownOffset; in lowerKernargMemParameter() local
1493 SDValue ShiftAmt = DAG.getConstant(OffsetDiff * 8, SL, MVT::i32); in lowerKernargMemParameter()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULowerKernelArguments.cpp | 162 int64_t OffsetDiff = EltOffset - AlignDownOffset; in runOnFunction() local
235 Value *ExtractBits = OffsetDiff == 0 ? in runOnFunction()
236 Load : Builder.CreateLShr(Load, OffsetDiff * 8); in runOnFunction()
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| D | SILoadStoreOptimizer.cpp | 825 unsigned OffsetDiff = std::abs((int)EltOffset1 - (int)EltOffset0); in offsetsCanBeCombined() local
828 if ((OffsetDiff % 64 == 0) && isUInt<8>(OffsetDiff / 64)) { in offsetsCanBeCombined()
837 if (isUInt<8>(OffsetDiff)) { in offsetsCanBeCombined()
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| D | SIISelLowering.cpp | 1690 int64_t OffsetDiff = Offset - AlignDownOffset; in lowerKernargMemParameter() local
1701 SDValue ShiftAmt = DAG.getConstant(OffsetDiff * 8, SL, MVT::i32); in lowerKernargMemParameter()
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringARM32.cpp | 1810 int32_t OffsetDiff = Offset - TempBaseOffset; in createMemOperand() local
1811 assert(AllowOffsets || OffsetDiff == 0); in createMemOperand()
1813 if (!Target->isLegalMemOffset(Ty, OffsetDiff)) { in createMemOperand()
1815 OffsetDiff = 0; in createMemOperand()
1821 llvm::cast<ConstantInteger32>(Target->Ctx->getConstantInt32(OffsetDiff)), in createMemOperand()
1987 const int32_t OffsetDiff = Offset - TempBaseOffset; in legalizeMemOperand() local
1988 if (OffsetDiff == 0) { in legalizeMemOperand()
1990 } else if (OperandARM32FlexImm::canHoldImm(OffsetDiff, &Rotate, &Imm8)) { in legalizeMemOperand()
1994 TempBaseOffset += OffsetDiff; in legalizeMemOperand()
1996 } else if (OperandARM32FlexImm::canHoldImm(-OffsetDiff, &Rotate, &Imm8)) { in legalizeMemOperand()
[all …]
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 2264 int OffsetDiff = DefStageNum - BaseStageNum; in applyInstrChange() local
2267 if (OffsetDiff > 0) in applyInstrChange()
2268 --OffsetDiff; in applyInstrChange()
2271 MI->getOperand(OffsetPos).getImm() + RegAndOffset.second * OffsetDiff; in applyInstrChange()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 2168 int OffsetDiff = DefStageNum - BaseStageNum; in applyInstrChange() local
2171 if (OffsetDiff > 0) in applyInstrChange()
2172 --OffsetDiff; in applyInstrChange()
2175 MI->getOperand(OffsetPos).getImm() + RegAndOffset.second * OffsetDiff; in applyInstrChange()
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| /external/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 3378 int OffsetDiff = DefStageNum - BaseStageNum; in applyInstrChange() local
3381 if (OffsetDiff > 0) in applyInstrChange()
3382 --OffsetDiff; in applyInstrChange()
3385 MI->getOperand(OffsetPos).getImm() + RegAndOffset.second * OffsetDiff; in applyInstrChange()
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