Searched refs:OpCopy (Results 1 – 8 of 8) sorted by relevance
/external/tensorflow/tensorflow/core/kernels/ |
D | scan_ops_gpu.h | 143 template <typename U = T, typename OpCopy = Op> 145 typename std::enable_if<IsSum<U, OpCopy>::value, U>::type t = U(0)) { in operator() 149 template <typename U = T, typename OpCopy = Op> 151 typename std::enable_if<IsProd<U, OpCopy>::value, U>::type t = U(1)) { in operator() 155 template <typename U = T, typename OpCopy = Op> 157 operator()(typename std::enable_if<IsLogSumExp<U, OpCopy>::value, U>::type t = in operator()
|
D | reduction_gpu_kernels.cu.h | 1032 template <typename U = T, typename OpCopy = Op> 1034 typename std::enable_if<IsSum<U, OpCopy>::value, U>::type t = U(0)) { 1038 template <typename U = T, typename OpCopy = Op> 1039 U operator()(typename std::enable_if<IsMax<U, OpCopy>::value, U>::type t = 1044 template <typename U = T, typename OpCopy = Op> 1045 U operator()(typename std::enable_if<IsMin<U, OpCopy>::value, U>::type t = 1050 template <typename U = T, typename OpCopy = Op> 1052 typename std::enable_if<IsProd<U, OpCopy>::value, U>::type t = U(1)) { 1056 template <typename U = T, typename OpCopy = Op> 1057 U operator()(typename std::enable_if<std::is_same<OpCopy, And>::value, [all …]
|
/external/llvm-project/polly/lib/CodeGen/ |
D | BlockGenerators.cpp | 1757 Value *OpCopy = nullptr; in addOperandToPHI() local 1767 OpCopy = getNewValue(Stmt, Op, BBCopyMap, LTS, getLoopForStmt(Stmt)); in addOperandToPHI() 1779 OpCopy = getNewValue(Stmt, PHI, BBCopyMap, LTS, getLoopForStmt(Stmt)); in addOperandToPHI() 1782 assert(OpCopy && "Incoming PHI value was not copied properly"); in addOperandToPHI() 1783 PHICopy->addIncoming(OpCopy, BBCopyEnd); in addOperandToPHI()
|
/external/llvm-project/llvm/lib/Target/X86/ |
D | X86InstructionSelector.cpp | 1518 unsigned OpCopy; // Opcode for copying dividend into lowreg, or in selectDivRem() member 1600 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpEntry.OpCopy), in selectDivRem()
|
D | X86FastISel.cpp | 1890 unsigned OpCopy; // Opcode for copying dividend into lowreg, or in X86SelectDivRem() member 1961 TII.get(OpEntry.OpCopy), TypeEntry.LowInReg).addReg(Op0Reg); in X86SelectDivRem()
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstructionSelector.cpp | 1562 unsigned OpCopy; // Opcode for copying dividend into lowreg, or in selectDivRem() member 1644 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpEntry.OpCopy), in selectDivRem()
|
D | X86FastISel.cpp | 1874 unsigned OpCopy; // Opcode for copying dividend into lowreg, or in X86SelectDivRem() member 1945 TII.get(OpEntry.OpCopy), TypeEntry.LowInReg).addReg(Op0Reg); in X86SelectDivRem()
|
/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 1795 unsigned OpCopy; // Opcode for copying dividend into lowreg, or in X86SelectDivRem() member 1866 TII.get(OpEntry.OpCopy), TypeEntry.LowInReg).addReg(Op0Reg); in X86SelectDivRem()
|