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Searched refs:Opc1 (Results 1 – 25 of 33) sorted by relevance

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/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCTLSDynamicCall.cpp89 unsigned Opc1, Opc2; in processBlock() local
94 Opc1 = PPC::ADDItlsgdL; in processBlock()
98 Opc1 = PPC::ADDItlsldL; in processBlock()
102 Opc1 = PPC::ADDItlsgdL32; in processBlock()
106 Opc1 = PPC::ADDItlsldL32; in processBlock()
111 Opc1 = PPC::PADDI8pc; in processBlock()
130 Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3).addImm(0); in processBlock()
134 Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3).addReg(InReg); in processBlock()
DPPCISelDAGToDAG.cpp5380 unsigned Opc1, Opc2, Opc3; in Select() local
5384 Opc1 = PPC::VSPLTISB; in Select()
5389 Opc1 = PPC::VSPLTISH; in Select()
5395 Opc1 = PPC::VSPLTISW; in Select()
5409 SDNode *Tmp = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
5421 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
5423 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
5435 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
5437 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCTLSDynamicCall.cpp82 unsigned Opc1, Opc2; in processBlock() local
89 Opc1 = PPC::ADDItlsgdL; in processBlock()
93 Opc1 = PPC::ADDItlsldL; in processBlock()
97 Opc1 = PPC::ADDItlsgdL32; in processBlock()
101 Opc1 = PPC::ADDItlsldL32; in processBlock()
117 MachineInstr *Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3) in processBlock()
DPPCISelDAGToDAG.cpp5228 unsigned Opc1, Opc2, Opc3; in Select() local
5232 Opc1 = PPC::VSPLTISB; in Select()
5237 Opc1 = PPC::VSPLTISH; in Select()
5243 Opc1 = PPC::VSPLTISW; in Select()
5257 SDNode *Tmp = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
5269 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
5271 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
5283 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
5285 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
/external/llvm/lib/Target/PowerPC/
DPPCTLSDynamicCall.cpp75 unsigned Opc1, Opc2; in processBlock() local
82 Opc1 = PPC::ADDItlsgdL; in processBlock()
86 Opc1 = PPC::ADDItlsldL; in processBlock()
90 Opc1 = PPC::ADDItlsgdL32; in processBlock()
94 Opc1 = PPC::ADDItlsldL32; in processBlock()
105 MachineInstr *Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3) in processBlock()
DPPCISelDAGToDAG.cpp3058 unsigned Opc1, Opc2, Opc3; in Select() local
3062 Opc1 = PPC::VSPLTISB; in Select()
3067 Opc1 = PPC::VSPLTISH; in Select()
3073 Opc1 = PPC::VSPLTISW; in Select()
3087 SDNode *Tmp = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
3100 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
3102 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
3115 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
3117 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
/external/llvm/lib/Target/Mips/
DMips16ISelLowering.h56 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
60 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
DMips16ISelLowering.cpp584 Mips16TargetLowering::emitSelT16(unsigned Opc1, unsigned Opc2, MachineInstr &MI, in emitSelT16() argument
622 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSelT16()
649 Mips16TargetLowering::emitSeliT16(unsigned Opc1, unsigned Opc2, in emitSeliT16() argument
688 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSeliT16()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16ISelLowering.h56 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
60 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
DMips16ISelLowering.cpp571 Mips16TargetLowering::emitSelT16(unsigned Opc1, unsigned Opc2, MachineInstr &MI, in emitSelT16() argument
609 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSelT16()
636 Mips16TargetLowering::emitSeliT16(unsigned Opc1, unsigned Opc2, in emitSeliT16() argument
675 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSeliT16()
/external/llvm-project/llvm/lib/Target/Mips/
DMips16ISelLowering.h56 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
60 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
DMips16ISelLowering.cpp571 Mips16TargetLowering::emitSelT16(unsigned Opc1, unsigned Opc2, MachineInstr &MI, in emitSelT16() argument
609 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSelT16()
636 Mips16TargetLowering::emitSeliT16(unsigned Opc1, unsigned Opc2, in emitSeliT16() argument
675 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSeliT16()
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp55 unsigned Opc1 = N1->getMachineOpcode(); in nodesHaveSameOperandValue() local
58 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName); in nodesHaveSameOperandValue()
100 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr() local
103 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad()) in areLoadsFromSameBasePtr()
106 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
124 AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::data1) != -1) in areLoadsFromSameBasePtr()
132 if (isSMRD(Opc0) && isSMRD(Opc1)) { in areLoadsFromSameBasePtr()
157 if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1))) { in areLoadsFromSameBasePtr()
167 int OffIdx1 = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::offset); in areLoadsFromSameBasePtr()
/external/llvm-project/clang/lib/StaticAnalyzer/Checkers/
DContainerModeling.cpp140 BinaryOperator::Opcode Opc1,
974 BinaryOperator::Opcode Opc1, in invalidateIteratorPositions() argument
978 return compare(State, Pos.getOffset(), Offset1, Opc1) && in invalidateIteratorPositions()
/external/llvm-project/llvm/lib/Transforms/InstCombine/
DInstCombineVectorOps.cpp1919 BinaryOperator::BinaryOps Opc1 = B1->getOpcode(); in foldSelectShuffle() local
1921 if (ConstantsAreOp1 && Opc0 != Opc1) { in foldSelectShuffle()
1925 if (Opc0 == Instruction::Shl || Opc1 == Instruction::Shl) in foldSelectShuffle()
1933 Opc1 = AltB1.Opcode; in foldSelectShuffle()
1938 if (Opc0 != Opc1) in foldSelectShuffle()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
DInstCombineVectorOps.cpp1582 BinaryOperator::BinaryOps Opc1 = B1->getOpcode(); in foldSelectShuffle() local
1584 if (ConstantsAreOp1 && Opc0 != Opc1) { in foldSelectShuffle()
1588 if (Opc0 == Instruction::Shl || Opc1 == Instruction::Shl) in foldSelectShuffle()
1596 Opc1 = AltB1.Opcode; in foldSelectShuffle()
1601 if (Opc0 != Opc1) in foldSelectShuffle()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp107 unsigned Opc1 = N1->getMachineOpcode(); in nodesHaveSameOperandValue() local
110 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName); in nodesHaveSameOperandValue()
153 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr() local
156 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad()) in areLoadsFromSameBasePtr()
159 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
173 int Offset1Idx = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::offset); in areLoadsFromSameBasePtr()
182 Offset1Idx -= get(Opc1).NumDefs; in areLoadsFromSameBasePtr()
188 if (isSMRD(Opc0) && isSMRD(Opc1)) { in areLoadsFromSameBasePtr()
191 AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::sbase) == -1) in areLoadsFromSameBasePtr()
214 if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1))) { in areLoadsFromSameBasePtr()
[all …]
/external/llvm/include/llvm/IR/
DPatternMatch.h635 template <typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
643 if (V->getValueID() == Value::InstructionVal + Opc1 || in match()
649 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) && in match()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp116 unsigned Opc1 = N1->getMachineOpcode(); in nodesHaveSameOperandValue() local
119 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName); in nodesHaveSameOperandValue()
164 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr() local
167 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad()) in areLoadsFromSameBasePtr()
170 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
184 int Offset1Idx = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::offset); in areLoadsFromSameBasePtr()
193 Offset1Idx -= get(Opc1).NumDefs; in areLoadsFromSameBasePtr()
199 if (isSMRD(Opc0) && isSMRD(Opc1)) { in areLoadsFromSameBasePtr()
202 AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::sbase) == -1) in areLoadsFromSameBasePtr()
225 if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1))) { in areLoadsFromSameBasePtr()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.cpp5750 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr() local
5752 switch (Opc1) { in areLoadsFromSameBasePtr()
5951 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear() local
5953 if (Opc1 != Opc2) in shouldScheduleLoadsNear()
5956 switch (Opc1) { in shouldScheduleLoadsNear()
DX86ISelLowering.cpp23637 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
23658 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
23670 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
23692 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
23708 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
23733 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
23759 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
23771 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
23820 NewOp = DAG.getNode(IntrData->Opc1, dl, VT, Src1, Src2, in LowerINTRINSIC_WO_CHAIN()
23837 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
[all …]
DX86IntrinsicsInfo.h47 uint16_t Opc1; member
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrInfo.cpp6506 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr() local
6508 switch (Opc1) { in areLoadsFromSameBasePtr()
6707 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear() local
6709 if (Opc1 != Opc2) in shouldScheduleLoadsNear()
6712 switch (Opc1) { in shouldScheduleLoadsNear()
DX86ISelLowering.cpp24762 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
24783 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
24795 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
24817 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
24839 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
24873 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
24899 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
24911 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
24960 NewOp = DAG.getNode(IntrData->Opc1, dl, VT, Src1, Src2, in LowerINTRINSIC_WO_CHAIN()
24977 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
[all …]
/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp6614 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr() local
6616 switch (Opc1) { in areLoadsFromSameBasePtr()
6722 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear() local
6724 if (Opc1 != Opc2) in shouldScheduleLoadsNear()
6727 switch (Opc1) { in shouldScheduleLoadsNear()

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