Home
last modified time | relevance | path

Searched refs:OutputArg (Results 1 – 25 of 170) sorted by relevance

1234567

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsCCState.h37 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
42 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
59 PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
89 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
104 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
130 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
140 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, in CheckReturn()
DMipsCCState.cpp99 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128()
121 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForVectorFloat()
123 ISD::OutputArg Out = Outs[i]; in PreAnalyzeReturnForVectorFloat()
132 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands()
/external/llvm-project/llvm/lib/Target/Mips/
DMipsCCState.h37 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
42 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
59 PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
89 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
104 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
130 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
140 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, in CheckReturn()
DMipsCCState.cpp99 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128()
121 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForVectorFloat()
123 ISD::OutputArg Out = Outs[i]; in PreAnalyzeReturnForVectorFloat()
132 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands()
/external/llvm/lib/Target/Mips/
DMipsCCState.h38 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
43 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
73 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
87 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
110 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
118 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, in CheckReturn()
DMipsCCState.cpp87 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128()
100 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/
DVEISelLowering.h53 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
56 const SmallVectorImpl<ISD::OutputArg> &Outs,
DVEISelLowering.cpp43 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn()
52 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetCallingConv.h195 struct OutputArg { struct
211 OutputArg() = default; argument
212 OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed, in OutputArg() function
DCallingConvLower.h302 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
308 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
313 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
323 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeArguments()
/external/llvm/include/llvm/Target/
DTargetCallingConv.h183 struct OutputArg { struct
199 OutputArg() : IsFixed(false) {} in OutputArg() argument
200 OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed, in OutputArg() function
/external/llvm-project/llvm/include/llvm/CodeGen/
DTargetCallingConv.h241 struct OutputArg { struct
257 OutputArg() = default; argument
258 OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed, in OutputArg() argument
DCallingConvLower.h294 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
300 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
305 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
315 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeArguments()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h140 const SmallVectorImpl<ISD::OutputArg> &Outs,
170 const SmallVectorImpl<ISD::OutputArg> &Outs,
174 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/llvm-project/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h144 const SmallVectorImpl<ISD::OutputArg> &Outs,
174 const SmallVectorImpl<ISD::OutputArg> &Outs,
178 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCISelLowering.h105 const SmallVectorImpl<ISD::OutputArg> &Outs,
111 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
/external/llvm-project/llvm/lib/Target/ARC/
DARCISelLowering.h105 const SmallVectorImpl<ISD::OutputArg> &Outs,
111 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
/external/llvm-project/llvm/lib/Target/XCore/
DXCoreISelLowering.h154 const SmallVectorImpl<ISD::OutputArg> &Outs,
221 const SmallVectorImpl<ISD::OutputArg> &Outs,
228 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.h155 const SmallVectorImpl<ISD::OutputArg> &Outs,
219 const SmallVectorImpl<ISD::OutputArg> &Outs,
226 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreISelLowering.h155 const SmallVectorImpl<ISD::OutputArg> &Outs,
221 const SmallVectorImpl<ISD::OutputArg> &Outs,
228 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h67 const SmallVectorImpl<ISD::OutputArg> &Outs,
70 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcISelLowering.h151 const SmallVectorImpl<ISD::OutputArg> &Outs,
156 const SmallVectorImpl<ISD::OutputArg> &Outs,
161 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcISelLowering.h151 const SmallVectorImpl<ISD::OutputArg> &Outs,
156 const SmallVectorImpl<ISD::OutputArg> &Outs,
161 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.h155 const SmallVectorImpl<ISD::OutputArg> &Outs,
160 const SmallVectorImpl<ISD::OutputArg> &Outs,
165 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.h162 const SmallVectorImpl<ISD::OutputArg> &Outs,
172 const SmallVectorImpl<ISD::OutputArg> &Outs,
175 const SmallVectorImpl<ISD::OutputArg> &Outs,

1234567