/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
D | llvm.amdgcn.raw.tbuffer.store.i8.ll | 3 …10 -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=PACKED %s 19 ; PACKED-LABEL: name: raw_tbuffer_store_i8__sgpr_rsrc__vgpr_voffset__sgpr_soffset 20 ; PACKED: bb.1 (%ir-block.0): 21 ; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0, $vgpr1 22 ; PACKED: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 23 ; PACKED: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2 24 ; PACKED: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3 25 ; PACKED: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr4 26 ; PACKED: [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr5 27 ; PACKED: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1 [all …]
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D | llvm.amdgcn.raw.tbuffer.store.f16.ll | 3 …10 -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=PACKED %s 19 ; PACKED-LABEL: name: raw_tbuffer_store_f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset 20 ; PACKED: bb.1 (%ir-block.0): 21 ; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0, $vgpr1 22 ; PACKED: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 23 ; PACKED: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2 24 ; PACKED: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3 25 ; PACKED: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr4 26 ; PACKED: [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr5 27 ; PACKED: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1 [all …]
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D | llvm.amdgcn.raw.buffer.store.format.f16.ll | 3 …mesa-mesa3d -mcpu=gfx810 -stop-after=instruction-select -o - %s | FileCheck -check-prefix=PACKED %s 19 ; PACKED-LABEL: name: raw_buffer_store_format__sgpr_rsrc__vgpr_val__vgpr_voffset__sgpr_soffset_f16 20 ; PACKED: bb.1 (%ir-block.0): 21 ; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0, $vgpr1 22 ; PACKED: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 23 ; PACKED: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 24 ; PACKED: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 25 ; PACKED: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 26 ; PACKED: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 27 ; PACKED: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1 [all …]
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D | legalize-llvm.amdgcn.image.load.2d.d16.ll | 3 …-mcpu=gfx810 -stop-after=legalizer -global-isel-abort=0 -o - %s | FileCheck -check-prefix=PACKED %s 25 ; PACKED-LABEL: name: image_load_f16 26 ; PACKED: bb.1 (%ir-block.0): 27 …; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1 28 ; PACKED: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2 29 ; PACKED: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3 30 ; PACKED: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4 31 ; PACKED: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5 32 ; PACKED: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6 33 ; PACKED: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7 [all …]
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D | llvm.amdgcn.raw.tbuffer.load.f16.ll | 3 …10 -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=PACKED %s 19 ; PACKED-LABEL: name: raw_tbuffer_load_f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset 20 ; PACKED: bb.1 (%ir-block.0): 21 ; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 22 ; PACKED: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 23 ; PACKED: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 24 ; PACKED: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 25 ; PACKED: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 26 ; PACKED: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 27 ; PACKED: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 [all …]
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D | llvm.amdgcn.struct.buffer.store.format.f16.ll | 3 …10 -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=PACKED %s 21 …; PACKED-LABEL: name: struct_buffer_store_format_f16__vgpr_val__sgpr_rsrc__vgpr_vindex__vgpr_voffs… 22 ; PACKED: bb.1 (%ir-block.0): 23 ; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0, $vgpr1, $vgpr2 24 ; PACKED: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 25 ; PACKED: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2 26 ; PACKED: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3 27 ; PACKED: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr4 28 ; PACKED: [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr5 29 ; PACKED: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1 [all …]
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D | llvm.amdgcn.struct.tbuffer.load.f16.ll | 3 …10 -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=PACKED %s 4 …64 -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=PACKED %s 22 ; PACKED-LABEL: name: struct_tbuffer_load_f16__sgpr_rsrc__vgpr_vindex__vgpr_voffset__sgpr_soffset 23 ; PACKED: bb.1 (%ir-block.0): 24 ; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0, $vgpr1 25 ; PACKED: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 26 ; PACKED: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 27 ; PACKED: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 28 ; PACKED: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 29 ; PACKED: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 [all …]
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D | llvm.amdgcn.struct.buffer.load.format.f16.ll | 3 …10 -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=PACKED %s 21 …; PACKED-LABEL: name: struct_buffer_load_format_f16__sgpr_rsrc__vgpr_vindex__vgpr_voffset__sgpr_so… 22 ; PACKED: bb.1 (%ir-block.0): 23 ; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0, $vgpr1 24 ; PACKED: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 25 ; PACKED: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 26 ; PACKED: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 27 ; PACKED: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 28 ; PACKED: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 29 ; PACKED: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr1 [all …]
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D | llvm.amdgcn.raw.buffer.load.format.f16.ll | 2 …10 -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=PACKED %s 7 ; PACKED-LABEL: name: raw_buffer_load_format_f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset 8 ; PACKED: bb.1 (%ir-block.0): 9 ; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 10 ; PACKED: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 11 ; PACKED: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 12 ; PACKED: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 13 ; PACKED: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 14 ; PACKED: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 15 ; PACKED: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 [all …]
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D | llvm.amdgcn.image.load.1d.d16.ll | 3 …amdgcn-mesa-mesa3d -mcpu=gfx810 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8-PACKED %s 22 ; GFX8-PACKED-LABEL: load_1d_f16_x: 23 ; GFX8-PACKED: ; %bb.0: 24 ; GFX8-PACKED-NEXT: s_mov_b32 s0, s2 25 ; GFX8-PACKED-NEXT: s_mov_b32 s1, s3 26 ; GFX8-PACKED-NEXT: s_mov_b32 s2, s4 27 ; GFX8-PACKED-NEXT: s_mov_b32 s3, s5 28 ; GFX8-PACKED-NEXT: s_mov_b32 s4, s6 29 ; GFX8-PACKED-NEXT: s_mov_b32 s5, s7 30 ; GFX8-PACKED-NEXT: s_mov_b32 s6, s8 [all …]
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D | legalize-llvm.amdgcn.image.store.2d.d16.ll | 8 ; PACKED-LABEL: name: image_store_f16 9 ; PACKED: bb.1 (%ir-block.0): 10 …; PACKED: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr… 11 ; PACKED: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2 12 ; PACKED: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3 13 ; PACKED: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4 14 ; PACKED: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5 15 ; PACKED: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6 16 ; PACKED: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7 17 ; PACKED: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8 [all …]
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/external/clang/test/CodeGen/ |
D | override-layout.c | 7 #ifndef PACKED 8 # define PACKED __attribute__((packed)) macro 18 int x[6] PACKED; 27 } PACKED; variable 32 struct PACKED X2 { 41 short x PACKED; member 58 struct PACKED X5 { double a[19]; signed char b; }; 63 struct PACKED X6 { long double a; char b; }; 71 } PACKED; variable 79 } PACKED; variable [all …]
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/external/llvm-project/clang/test/CodeGen/ |
D | override-layout.c | 7 #ifndef PACKED 8 # define PACKED __attribute__((packed)) macro 18 int x[6] PACKED; 27 } PACKED; variable 32 struct PACKED X2 { 41 short x PACKED; member 58 struct PACKED X5 { double a[19]; signed char b; }; 63 struct PACKED X6 { long double a; char b; }; 71 } PACKED; variable 79 } PACKED; variable [all …]
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/external/mesa3d/src/freedreno/ir3/ |
D | instr-a3xx.h | 27 #define PACKED __attribute__((__packed__)) macro 316 typedef union PACKED { union 318 struct PACKED { struct 370 typedef struct PACKED { struct 372 union PACKED { union 373 struct PACKED { struct 377 struct PACKED { struct 381 struct PACKED { struct 405 typedef struct PACKED { argument 407 union PACKED { union [all …]
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/external/mesa3d/src/freedreno/afuc/ |
D | afuc.h | 38 #define PACKED __attribute__((__packed__)) macro 116 typedef union PACKED { union 118 struct PACKED { struct 124 struct PACKED { struct 130 struct PACKED { struct 139 struct PACKED { struct 146 struct PACKED { struct 152 struct PACKED { struct 156 struct PACKED { struct 161 struct PACKED { struct [all …]
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | buf_fmt_packed_d16.txt | 1 …m-mc -arch=amdgcn -mcpu=gfx810 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=PACKED 2 …m-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=PACKED 4 # PACKED: buffer_load_format_d16_x v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x20,0xe0,0x00,0x01,0… 7 # PACKED: buffer_load_format_d16_xy v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x24,0xe0,0x00,0x01,… 10 # PACKED: buffer_load_format_d16_xyz v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x28,0xe0,0x00,… 13 # PACKED: buffer_load_format_d16_xyzw v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x2c,0xe0,0x00… 16 # PACKED: buffer_store_format_d16_x v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x30,0xe0,0x00,0x01,… 19 # PACKED: buffer_store_format_d16_xy v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x34,0xe0,0x00,0x01… 22 # PACKED: buffer_store_format_d16_xyz v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x38,0xe0,0x00… 25 # PACKED: buffer_store_format_d16_xyzw v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x3c,0xe0,0x0… [all …]
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/external/clang/test/CodeGenCXX/ |
D | override-layout.cpp | 8 #ifndef PACKED 9 # define PACKED __attribute__((packed)) macro 17 int x[6] PACKED; 24 } PACKED; variable 27 struct PACKED X2 : public X1, public X0, public Empty1 { 33 struct PACKED X3 : virtual public X1, public X0 { 39 struct PACKED X4 { 58 struct PACKED X5 {
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/external/llvm-project/clang/test/CodeGenCXX/ |
D | override-layout.cpp | 8 #ifndef PACKED 9 # define PACKED __attribute__((packed)) macro 17 int x[6] PACKED; 24 } PACKED; variable 27 struct PACKED X2 : public X1, public X0, public Empty1 { 33 struct PACKED X3 : virtual public X1, public X0 { 39 struct PACKED X4 { 58 struct PACKED X5 {
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | llvm.amdgcn.raw.tbuffer.load.d16.ll | 2 …-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,PREGFX10,PREGFX10-PACKED %s 3 …-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,PREGFX10,PREGFX10-PACKED %s 4 …verify-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,GFX10,GFX10-PACKED %s 19 ; PREGFX10-PACKED: tbuffer_load_format_d16_xy v[[FULL:[0-9]+]], off, s[{{[0-9]+:[0-9]+}}], 0 format… 20 ; GFX10-PACKED: tbuffer_load_format_d16_xy v[[FULL:[0-9]+]], off, s[{{[0-9]+:[0-9]+}}], 0 format:[B… 21 ; PACKED: v_lshrrev_b32_e32 v{{[0-9]+}}, 16, v[[FULL]] 34 ; PREGFX10-PACKED: tbuffer_load_format_d16_xyz v{{\[}}{{[0-9]+}}:[[HI:[0-9]+]]{{\]}}, off, s[{{[0-9… 35 ; GFX10-PACKED: tbuffer_load_format_d16_xyz v{{\[}}{{[0-9]+}}:[[HI:[0-9]+]]{{\]}}, off, s[{{[0-9]+:… 36 ; PACKED: v_mov_b32_e32 v{{[0-9]+}}, v[[HI]] 49 ; PREGFX10-PACKED: tbuffer_load_format_d16_xyzw v{{\[}}{{[0-9]+}}:[[HI:[0-9]+]]{{\]}}, off, s[{{[0-… [all …]
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D | llvm.amdgcn.struct.tbuffer.load.d16.ll | 2 …-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,PREGFX10,PREGFX10-PACKED %s 3 …-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,PREGFX10,PREGFX10-PACKED %s 4 …verify-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,GFX10,GFX10-PACKED %s 21 ; PREGFX10-PACKED: tbuffer_load_format_d16_xy v[[FULL:[0-9]+]], [[ZEROREG]], s[{{[0-9]+:[0-9]+}}], … 22 ; GFX10-PACKED: tbuffer_load_format_d16_xy v[[FULL:[0-9]+]], [[ZEROREG]], s[{{[0-9]+:[0-9]+}}], 0 f… 23 ; PACKED: v_lshrrev_b32_e32 v{{[0-9]+}}, 16, v[[FULL]] 36 ; PREGFX10-PACKED: tbuffer_load_format_d16_xyz v{{\[}}{{[0-9]+}}:[[HI:[0-9]+]]{{\]}}, [[ZEROREG]], … 37 ; GFX10-PACKED: tbuffer_load_format_d16_xyz v{{\[}}{{[0-9]+}}:[[HI:[0-9]+]]{{\]}}, [[ZEROREG]], s[{… 38 ; PACKED: v_mov_b32_e32 v{{[0-9]+}}, v[[HI]] 51 ; PREGFX10-PACKED: tbuffer_load_format_d16_xyzw v{{\[}}{{[0-9]+}}:[[HI:[0-9]+]]{{\]}}, [[ZEROREG]],… [all …]
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D | llvm.amdgcn.raw.tbuffer.store.d16.ll | 2 …-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,PREGFX10,PREGFX10-PACKED %s 3 …-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,PREGFX10,PREGFX10-PACKED %s 4 …verify-machineinstrs | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,GFX10,GFX10-PACKED %s 27 ; PREGFX10-PACKED: tbuffer_store_format_d16_xy v{{[0-9]+}}, off, s[{{[0-9]+:[0-9]+}}], 0 format:[BU… 28 ; GFX10-PACKED: tbuffer_store_format_d16_xy v{{[0-9]+}}, off, s[{{[0-9]+:[0-9]+}}], 0 format:[BUF_F… 48 ; PACKED-DAG: s_and_b32 [[MASKED0:s[0-9]+]], s[[S_DATA_1]], 0xffff{{$}} 49 ; PACKED-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], s[[S_DATA_0]] 50 ; PACKED-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], [[MASKED0]] 51 ; PREGFX10-PACKED: tbuffer_store_format_d16_xyz v{{\[}}[[LO]]:[[HI]]{{\]}}, off, s[{{[0-9]+:[0-9]+}… 52 ; GFX10-PACKED: tbuffer_store_format_d16_xyz v{{\[}}[[LO]]:[[HI]]{{\]}}, off, s[{{[0-9]+:[0-9]+}}],… [all …]
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D | llvm.amdgcn.struct.tbuffer.store.d16.ll | 2 …trs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,PREGFX10,PACKED,GFX81,PREGFX10-PACKED %s 3 …strs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,PREGFX10,PACKED,GFX9,PREGFX10-PACKED %s 4 …y-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX10,PACKED,GFX10-PACKED %s 27 ; PREGFX10-PACKED: tbuffer_store_format_d16_xy v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], 0 fo… 28 ; GFX10-PACKED: tbuffer_store_format_d16_xy v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], 0 forma… 47 ; PACKED-DAG: s_and_b32 [[MASKED0:s[0-9]+]], s[[S_DATA_1]], 0xffff{{$}} 48 ; PACKED-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], s[[S_DATA_0]] 49 ; PACKED-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], [[MASKED0]] 50 ; PREGFX10-PACKED: tbuffer_store_format_d16_xyz v{{\[}}[[LO]]:[[HI]]{{\]}}, v{{[0-9]+}}, s[{{[0-9]+… 51 ; GFX10-PACKED: tbuffer_store_format_d16_xyz v{{\[}}[[LO]]:[[HI]]{{\]}}, v{{[0-9]+}}, s[{{[0-9]+:[0… [all …]
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D | pack.v2i16.ll | 9 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], [[VAL0]], [[VAL1]] 10 ; GFX9: ; use [[PACKED]] 26 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], 0x1c8, [[VAL1]] 27 ; GFX9: ; use [[PACKED]] 41 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], [[VAL0]], 0x1c8 42 ; GFX9: ; use [[PACKED]] 59 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[MASKED]] 60 ; GFX9: ; use [[PACKED]] 82 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[MASKED]] 84 ; GFX9: v_add_u32_e32 v{{[0-9]+}}, 9, [[PACKED]] [all …]
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D | llvm.amdgcn.buffer.load.format.d16.ll | 2 …fx810 -verify-machineinstrs | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=PACKED %s 3 …fx900 -verify-machineinstrs | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=PACKED %s 17 ; PACKED: buffer_load_format_d16_xy v[[FULL:[0-9]+]], off, s[{{[0-9]+:[0-9]+}}], 0 18 ; PACKED: v_lshrrev_b32_e32 v{{[0-9]+}}, 16, v[[FULL]] 30 ; PACKED: buffer_load_format_d16_xyz v{{\[}}{{[0-9]+}}:[[HI:[0-9]+]]{{\]}}, off, s[{{[0-9]+:[0-9]+}… 31 ; PACKED: v_mov_b32_e32 v{{[0-9]+}}, v[[HI]] 43 ; PACKED: buffer_load_format_d16_xyzw v{{\[}}{{[0-9]+}}:[[HI:[0-9]+]]{{\]}}, off, s[{{[0-9]+:[0-9]+… 44 ; PACKED: v_lshrrev_b32_e32 v{{[0-9]+}}, 16, v[[HI]]
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/external/mesa3d/src/freedreno/ir2/ |
D | instr-a2xx.h | 27 #define PACKED __attribute__((__packed__)) macro 127 typedef struct PACKED { struct 214 typedef struct PACKED { struct 227 typedef struct PACKED { argument 236 typedef struct PACKED { argument 249 typedef struct PACKED { argument 258 typedef union PACKED { argument 263 struct PACKED { struct 322 typedef struct PACKED { struct 356 typedef struct PACKED { argument [all …]
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