/external/speex/ti/speex_C54_test/ |
D | speex_C54_test.cmd | 42 /* PAGE 0: P_DARAM03: origin = 0x80, len = 0x7f00*/ 43 PAGE 0: P_DARAM03: origin = 0x5000, len = 0x2f80 44 PAGE 0: VECT: origin = 0x7f80, len = 0x80 45 PAGE 0: P_DARAM47: origin = 0x18000, len = 0x8000 46 PAGE 0: SARAM03: origin = 0x28000, len = 0x8000 47 PAGE 0: SARAM47: origin = 0x38000, len = 0x8000 49 PAGE 1: USERREGS: origin = 0x60, len = 0x1a 50 PAGE 1: BIOSREGS: origin = 0x7c, len = 0x4 51 PAGE 1: CSLREGS: origin = 0x7a, len = 0x2 58 .vectors: {} > VECT PAGE 0 [all …]
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/external/llvm-project/llvm/test/MC/AArch64/ |
D | macho-addend-range.s | 3 adrp x0, (_foo + 1)@PAGE 4 adrp x0, (_foo - 1)@PAGE 5 adrp x0, (_foo + 0x7fffff)@PAGE 6 adrp x0, (_foo - 0x800000)@PAGE 13 adrp x0, (_foo + 0x800000)@PAGE 14 adrp x0, (_foo - 0x800001)@PAGE
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D | arm64-arm64-fixup.s | 9 ; CHECK: adrp x3, _printf@PAGE ; encoding: [0x03'A',A,A,0x90'A'] 10 ; CHECK: fixup A - offset: 0, value: _printf@PAGE, kind: fixup_aarch64_pcrel_adrp_imm21
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/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | arm64-fp-imm-size.ll | 7 ; CHECK: adrp x[[REG:[0-9]+]], lCPI0_0@PAGE 17 ; CHECK: adrp x[[REG:[0-9]+]], lCPI1_0@PAGE 25 ; CHECK: adrp x[[REG:[0-9]+]], lCPI2_0@PAGE 36 ; CHECK: adrp x[[REG:[0-9]+]], lCPI3_0@PAGE 46 ; CHECK: adrp x[[REG:[0-9]+]], lCPI4_0@PAGE 54 ; CHECK: adrp x[[REG:[0-9]+]], lCPI5_0@PAGE
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D | global-merge-ignore-single-use-minsize.ll | 14 ; CHECK-NEXT: adrp x8, [[SET:__MergedGlobals]]@PAGE 28 ; CHECK-NEXT: adrp x8, _m2@PAGE 29 ; CHECK-NEXT: adrp x9, _n2@PAGE 47 ; CHECK-NEXT: adrp x8, [[SET]]@PAGE+8 60 ; CHECK-NEXT: adrp x8, [[SET]]@PAGE+8 61 ; CHECK-NEXT: adrp x9, _n4@PAGE
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D | global-merge-group-by-use.ll | 16 ; CHECK-NEXT: adrp x8, [[SET1:__MergedGlobals.[0-9]*]]@PAGE 31 ; CHECK-NEXT: adrp x8, [[SET2:__MergedGlobals.[0-9]*]]@PAGE 51 ; CHECK-NEXT: adrp x8, _m3@PAGE 52 ; CHECK-NEXT: adrp x9, [[SET3:__MergedGlobals[0-9]*]]@PAGE 66 ; CHECK-NEXT: adrp x8, [[SET3]]@PAGE 82 ; CHECK-NEXT: adrp x8, _o5@PAGE
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D | arm64-2012-05-07-MemcpyAlignBug.ll | 9 ; CHECK: adrp x[[PAGE:[0-9]+]], {{l_b@PAGE|.Lb}} 10 ; CHECK: add x[[ADDR:[0-9]+]], x[[PAGE]], {{l_b@PAGEOFF|:lo12:.Lb}}
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D | global-merge-ignore-single-use.ll | 14 ; CHECK-NEXT: adrp x8, [[SET:__MergedGlobals]]@PAGE 28 ; CHECK-NEXT: adrp x8, [[SET]]@PAGE 41 ; CHECK-NEXT: adrp x8, [[SET]]@PAGE+12 54 ; CHECK-NEXT: adrp x8, _o2@PAGE
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D | arm64-fast-isel-intrinsic.ll | 8 ; ARM64: adrp x8, _message@PAGE 24 ; ARM64: adrp x8, _message@PAGE 38 ; ARM64: adrp x8, _message@PAGE 52 ; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE 69 ; ARM64: adrp [[REG3:x[0-9]+]], _message@PAGE 86 ; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE 103 ; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE 122 ; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE
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D | arm64-fp-imm.ll | 7 ; CHECK: adrp x[[REG:[0-9]+]], lCPI0_0@PAGE 27 ; CHECK: adrp x[[REG:[0-9]+]], lCPI2_0@PAGE
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
D | stm32l4xx_hal_flash.h | 898 #define IS_FLASH_PAGE(PAGE) ((PAGE) < 256) argument 900 #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)… argument 901 … ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 128) : \ 902 … ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 64) : \ 903 ((PAGE) < 256))))) 905 #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)… argument 906 … ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \ 907 ((PAGE) < 256)))) 909 #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)… argument 910 … ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? ((PAGE) < 64) : \ [all …]
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
D | stm32l4xx_hal_flash.h | 898 #define IS_FLASH_PAGE(PAGE) ((PAGE) < 256) argument 900 #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)… argument 901 … ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 128) : \ 902 … ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 64) : \ 903 ((PAGE) < 256))))) 905 #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)… argument 906 … ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \ 907 ((PAGE) < 256)))) 909 #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)… argument 910 … ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? ((PAGE) < 64) : \ [all …]
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/external/jemalloc_new/test/unit/ |
D | rtree.c | 76 assert_ptr_null(rtree_extent_read(tsdn, rtree, &rtree_ctx, PAGE, in TEST_BEGIN() 101 assert_false(rtree_write(tsdn, rtree, &rtree_ctx, PAGE, &extent_a, in TEST_BEGIN() 104 rtree_szind_slab_update(tsdn, rtree, &rtree_ctx, PAGE, in TEST_BEGIN() 106 assert_ptr_eq(rtree_extent_read(tsdn, rtree, &rtree_ctx, PAGE, true), in TEST_BEGIN() 124 uintptr_t keys[] = {PAGE, PAGE + 1, in TEST_BEGIN() 125 PAGE + (((uintptr_t)1) << LG_PAGE) - 1}; in TEST_BEGIN()
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D | pages.c | 8 alloc_size = HUGEPAGE * 2 - PAGE; in TEST_BEGIN() 10 pages = pages_map(NULL, alloc_size, PAGE, &commit); in TEST_BEGIN()
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D | extent_quantize.c | 66 extent_size = cache_oblivious ? lextent_size + PAGE : in TEST_BEGIN() 82 extent_size_quantize_floor(extent_size - PAGE), in TEST_BEGIN() 95 PAGE); in TEST_BEGIN()
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/external/llvm/test/CodeGen/AArch64/ |
D | global-merge-ignore-single-use-minsize.ll | 14 ; CHECK-NEXT: adrp x8, [[SET:l__MergedGlobals]]@PAGE 28 ; CHECK-NEXT: adrp x8, _m2@PAGE 29 ; CHECK-NEXT: adrp x9, _n2@PAGE 47 ; CHECK-NEXT: adrp x8, [[SET]]@PAGE 60 ; CHECK-NEXT: adrp x8, [[SET]]@PAGE 62 ; CHECK-NEXT: adrp x9, _n4@PAGE
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D | arm64-fp-imm.ll | 7 ; CHECK: adrp x[[REG:[0-9]+]], lCPI0_0@PAGE 17 ; CHECK: adrp x[[REG:[0-9]+]], lCPI1_0@PAGE 28 ; CHECK: adrp x[[REG:[0-9]+]], lCPI2_0@PAGE
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D | global-merge-group-by-use.ll | 15 ; CHECK-NEXT: adrp x8, [[SET1:l__MergedGlobals.[0-9]*]]@PAGE 30 ; CHECK-NEXT: adrp x8, [[SET2:l__MergedGlobals.[0-9]*]]@PAGE 50 ; CHECK-NEXT: adrp x8, _m3@PAGE 51 ; CHECK-NEXT: adrp x9, [[SET3:l__MergedGlobals[0-9]*]]@PAGE 65 ; CHECK-NEXT: adrp x8, [[SET3]]@PAGE 81 ; CHECK-NEXT: adrp x8, _o5@PAGE
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D | arm64-2012-05-07-MemcpyAlignBug.ll | 9 ; CHECK: adrp x[[PAGE:[0-9]+]], {{l_b@PAGE|.Lb}} 10 ; CHECK: add x[[ADDR:[0-9]+]], x[[PAGE]], {{l_b@PAGEOFF|:lo12:.Lb}}
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D | arm64-fast-isel-intrinsic.ll | 8 ; ARM64: adrp x8, _message@PAGE 24 ; ARM64: adrp x8, _message@PAGE 38 ; ARM64: adrp x8, _message@PAGE 52 ; ARM64: adrp x9, _message@PAGE 69 ; ARM64: adrp x9, _message@PAGE 86 ; ARM64: adrp x9, _message@PAGE 103 ; ARM64: adrp x9, _message@PAGE 122 ; ARM64: adrp x9, _message@PAGE
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D | global-merge-ignore-single-use.ll | 13 ; CHECK-NEXT: adrp x8, [[SET:l__MergedGlobals]]@PAGE 27 ; CHECK-NEXT: adrp x8, [[SET]]@PAGE 40 ; CHECK-NEXT: adrp x8, [[SET]]@PAGE 53 ; CHECK-NEXT: adrp x8, _o2@PAGE
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/external/jemalloc_new/include/jemalloc/internal/ |
D | sz.h | 44 PAGE 76 return LARGE_MAXCLASS + PAGE; in sz_pind2sz_compute() 111 return LARGE_MAXCLASS + PAGE; in sz_psz2u() 268 if (size <= SMALL_MAXCLASS && alignment < PAGE) { in sz_sa2u() 310 if (usize + sz_large_pad + PAGE_CEILING(alignment) - PAGE < usize) { in sz_sa2u()
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/external/jemalloc_new/src/ |
D | pages.c | 120 void *new_addr = os_pages_map(ret, size, PAGE, commit); in os_pages_trim() 194 assert(alignment >= PAGE); in pages_map() 578 if (os_page > PAGE) { in pages_boot() 615 void *madv_free_page = os_pages_map(NULL, PAGE, PAGE, &committed); in pages_boot() 620 if (pages_purge_lazy(madv_free_page, PAGE)) { in pages_boot() 623 os_pages_unmap(madv_free_page, PAGE); in pages_boot()
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/external/llvm/test/MC/AArch64/ |
D | arm64-arm64-fixup.s | 9 ; CHECK: adrp x3, _printf@PAGE ; encoding: [0x03'A',A,A,0x90'A'] 10 ; CHECK: fixup A - offset: 0, value: _printf@PAGE, kind: fixup_aarch64_pcrel_adrp_imm21
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/external/autotest/client/cros/cellular/ |
D | forward_8960_screen | 24 PAGE=""" variable 101 self.wfile.write(PAGE % {'ssh_tunnel_port': ssh_tunnel_port,
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