| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 256 CASE_MASKZ_SHUF(PALIGNR, r) in getMaskName()
257 CASE_MASKZ_SHUF(PALIGNR, m) in getMaskName()
321 CASE_MASK_SHUF(PALIGNR, r) in getMaskName()
322 CASE_MASK_SHUF(PALIGNR, m) in getMaskName()
566 CASE_SHUF(PALIGNR, rri) in EmitAnyX86InstComments()
570 CASE_SHUF(PALIGNR, rmi) in EmitAnyX86InstComments()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 383 PALIGNR, enumerator
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| D | X86InstrFragmentsSIMD.td | 359 def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
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| D | X86ISelLowering.cpp | 3800 case X86ISD::PALIGNR: in isTargetShuffle()
4894 case X86ISD::PALIGNR: in getTargetShuffleMask()
7802 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, Lo, Hi, in lowerVectorShuffleAsByteRotate()
22228 case X86ISD::PALIGNR: return "X86ISD::PALIGNR"; in getTargetNodeName()
30996 case X86ISD::PALIGNR: in PerformDAGCombine()
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| D | X86InstrSSE.td | 5714 defm PALIGNR : ssse3_palignr<"palignr">;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86InstComments.cpp | 705 CASE_SHUF(PALIGNR, rri) in EmitAnyX86InstComments()
710 CASE_SHUF(PALIGNR, rmi) in EmitAnyX86InstComments()
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| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86InstComments.cpp | 844 CASE_SHUF(PALIGNR, rri) in EmitAnyX86InstComments()
849 CASE_SHUF(PALIGNR, rmi) in EmitAnyX86InstComments()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 438 PALIGNR, enumerator
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| D | X86InstrFragmentsSIMD.td | 376 def X86PAlignr : SDNode<"X86ISD::PALIGNR",
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| D | X86ISelLowering.cpp | 4794 case X86ISD::PALIGNR: in isTargetShuffle()
6970 case X86ISD::PALIGNR: in getTargetShuffleMask()
12173 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, DAG.getBitcast(ByteVT, Hi), in lowerShuffleAsByteRotateAndPermute()
12502 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, Lo, Hi, in lowerShuffleAsByteRotate()
30901 NODE_NAME_CASE(PALIGNR) in getTargetNodeName()
34897 Shuffle = X86ISD::PALIGNR; in matchBinaryPermuteShuffle()
48920 case X86ISD::PALIGNR: in combineConcatVectorOps()
49830 case X86ISD::PALIGNR: in PerformDAGCombine()
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| D | X86InstrSSE.td | 4889 defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, memop, i128mem,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 374 PALIGNR, enumerator
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| D | X86InstrFragmentsSIMD.td | 367 def X86PAlignr : SDNode<"X86ISD::PALIGNR",
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| D | X86ISelLowering.cpp | 4696 case X86ISD::PALIGNR: in isTargetShuffle()
6675 case X86ISD::PALIGNR: in getTargetShuffleMask()
11548 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, DAG.getBitcast(ByteVT, Hi), in lowerShuffleAsByteRotateAndPermute()
11756 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, Lo, Hi, in lowerShuffleAsByteRotate()
29758 case X86ISD::PALIGNR: return "X86ISD::PALIGNR"; in getTargetNodeName()
33201 Shuffle = X86ISD::PALIGNR; in matchBinaryPermuteShuffle()
46043 case X86ISD::PALIGNR: in PerformDAGCombine()
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| D | X86InstrSSE.td | 4893 defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, memop, i128mem,
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| /external/rust/crates/aho-corasick/src/packed/teddy/ |
| D | README.md | 284 The only hickup is that PALIGNR is used to align chunks in the 16-bit version,
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