Home
last modified time | relevance | path

Searched refs:PCLMULQDQ (Results 1 – 10 of 10) sorted by relevance

/external/rust/crates/libz-sys/src/zlib-ng/arch/x86/
DINDEX.md7 |crc_folding.c|SSE4 + PCLMULQDQ optimized CRC folding implementation|
/external/tensorflow/tensorflow/core/platform/
Dcpu_info.h91 PCLMULQDQ = 17, enumerator
Dcpu_info.cc234 case PCLMULQDQ: return cpuid->have_pclmulqdq_; in TestFeature()
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Disa.hpp56 bool PCLMULQDQ(void) { return CPU_Rep.f_1_ECX_[1]; } in PCLMULQDQ() function in InstructionSet
/external/rust/crates/ring/src/
Dcpu.rs335 pub(crate) const PCLMULQDQ: Feature = Feature { constant
/external/rust/crates/ring/src/aead/
Dgcm.rs314 && cpu::intel::PCLMULQDQ.available(cpu_features)) in detect_implementation()
/external/rust/crates/libz-sys/src/zlib-ng/
DREADME.md62 * Intel CRC32-B implementation using PCLMULQDQ
199 | WITH_PCLMULQDQ | | Build with PCLMULQDQ intrinsics …
DCMakeLists.txt104 option(WITH_PCLMULQDQ "Build with PCLMULQDQ" ON)
563 # Check whether compiler supports PCLMULQDQ intrinsics
751 …add_feature_info(PCLMUL_CRC 1 "Support CRC hash generation using PCLMULQDQ, using \"${SSSE3FLAG} $…
/external/zlib/patches/
D0001-simd.patch50 + * Compute the CRC32 using a parallelized folding approach with the PCLMULQDQ
/external/angle/third_party/zlib/patches/
D0001-simd.patch50 + * Compute the CRC32 using a parallelized folding approach with the PCLMULQDQ