Searched refs:PFC_DRVCTRL0 (Results 1 – 6 of 6) sorted by relevance
181 #define PFC_DRVCTRL0 (PFC_BASE + 0x0300U) macro
912 reg = mmio_read_32(PFC_DRVCTRL0); in pfc_init_h3_v2()921 pfc_reg_write(PFC_DRVCTRL0, reg); in pfc_init_h3_v2()
879 reg = mmio_read_32(PFC_DRVCTRL0); in pfc_init_h3_v1()888 pfc_reg_write(PFC_DRVCTRL0, reg); in pfc_init_h3_v1()
914 reg = mmio_read_32(PFC_DRVCTRL0); in pfc_init_m3n()923 pfc_reg_write(PFC_DRVCTRL0, reg); in pfc_init_m3n()
996 reg = mmio_read_32(PFC_DRVCTRL0); in pfc_init_g2m()1005 pfc_reg_write(PFC_DRVCTRL0, reg); in pfc_init_g2m()
1007 reg = mmio_read_32(PFC_DRVCTRL0); in pfc_init_m3()1016 pfc_reg_write(PFC_DRVCTRL0, reg); in pfc_init_m3()