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Searched refs:PINSRW (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/Target/X86/
DX86ISelLowering.h177 PINSRW, MMX_PINSRW, enumerator
DX86InstrFragmentsSIMD.td108 def X86pinsrw : SDNode<"X86ISD::PINSRW",
DX86ISelLowering.cpp12624 Opc = X86ISD::PINSRW; in LowerINSERT_VECTOR_ELT()
12684 return DAG.getNode(X86ISD::PINSRW, dl, VT, N0, N1, N2); in LowerINSERT_VECTOR_ELT()
22123 case X86ISD::PINSRW: return "X86ISD::PINSRW"; in getTargetNodeName()
DX86InstrSSE.td4569 defm PINSRW : sse2_pinsrw, PD;
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h184 PINSRW, enumerator
DX86InstrFragmentsSIMD.td97 def X86pinsrw : SDNode<"X86ISD::PINSRW",
DX86ISelLowering.cpp7568 case X86ISD::PINSRW: in getFauxShuffleMask()
18782 Opc = X86ISD::PINSRW; in LowerINSERT_VECTOR_ELT()
30791 NODE_NAME_CASE(PINSRW) in getTargetNodeName()
38393 case X86ISD::PINSRW: { in SimplifyDemandedBitsForTargetNode()
38591 case X86ISD::PINSRW: { in SimplifyMultipleUseDemandedBitsForTargetNode()
40157 InputVector.getOpcode() == X86ISD::PINSRW) && in combineExtractVectorElt()
42992 (N->getOpcode() == X86ISD::PINSRW && VT == MVT::v8i16) || in combineVectorInsert()
42996 if (N->getOpcode() == X86ISD::PINSRB || N->getOpcode() == X86ISD::PINSRW) { in combineVectorInsert()
49824 case X86ISD::PINSRW: return combineVectorInsert(N, DAG, DCI, Subtarget); in PerformDAGCombine()
DX86InstrSSE.td3965 defm PINSRW : sse2_pinsrw, PD;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h180 PINSRW, enumerator
DX86InstrFragmentsSIMD.td93 def X86pinsrw : SDNode<"X86ISD::PINSRW",
DX86ISelLowering.cpp7341 case X86ISD::PINSRW: { in getFauxShuffleMask()
17880 Opc = X86ISD::PINSRW; in LowerINSERT_VECTOR_ELT()
29646 case X86ISD::PINSRW: return "X86ISD::PINSRW"; in getTargetNodeName()
36010 case X86ISD::PINSRW: { in SimplifyDemandedBitsForTargetNode()
36114 case X86ISD::PINSRW: { in SimplifyMultipleUseDemandedBitsForTargetNode()
37423 InputVector.getOpcode() == X86ISD::PINSRW) && in combineExtractVectorElt()
39720 (N->getOpcode() == X86ISD::PINSRW && VT == MVT::v8i16)) && in combineVectorInsert()
46038 case X86ISD::PINSRW: return combineVectorInsert(N, DAG, DCI, Subtarget); in PerformDAGCombine()
DX86InstrSSE.td3960 defm PINSRW : sse2_pinsrw, PD;