1 /************************************************************************** 2 * 3 * Copyright 2007 VMware, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef PIPE_DEFINES_H 29 #define PIPE_DEFINES_H 30 31 #include "p_compiler.h" 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /** 38 * Gallium error codes. 39 * 40 * - A zero value always means success. 41 * - A negative value always means failure. 42 * - The meaning of a positive value is function dependent. 43 */ 44 enum pipe_error { 45 PIPE_OK = 0, 46 PIPE_ERROR = -1, /**< Generic error */ 47 PIPE_ERROR_BAD_INPUT = -2, 48 PIPE_ERROR_OUT_OF_MEMORY = -3, 49 PIPE_ERROR_RETRY = -4 50 /* TODO */ 51 }; 52 53 54 #define PIPE_BLENDFACTOR_ONE 0x1 55 #define PIPE_BLENDFACTOR_SRC_COLOR 0x2 56 #define PIPE_BLENDFACTOR_SRC_ALPHA 0x3 57 #define PIPE_BLENDFACTOR_DST_ALPHA 0x4 58 #define PIPE_BLENDFACTOR_DST_COLOR 0x5 59 #define PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 60 #define PIPE_BLENDFACTOR_CONST_COLOR 0x7 61 #define PIPE_BLENDFACTOR_CONST_ALPHA 0x8 62 #define PIPE_BLENDFACTOR_SRC1_COLOR 0x9 63 #define PIPE_BLENDFACTOR_SRC1_ALPHA 0x0A 64 #define PIPE_BLENDFACTOR_ZERO 0x11 65 #define PIPE_BLENDFACTOR_INV_SRC_COLOR 0x12 66 #define PIPE_BLENDFACTOR_INV_SRC_ALPHA 0x13 67 #define PIPE_BLENDFACTOR_INV_DST_ALPHA 0x14 68 #define PIPE_BLENDFACTOR_INV_DST_COLOR 0x15 69 #define PIPE_BLENDFACTOR_INV_CONST_COLOR 0x17 70 #define PIPE_BLENDFACTOR_INV_CONST_ALPHA 0x18 71 #define PIPE_BLENDFACTOR_INV_SRC1_COLOR 0x19 72 #define PIPE_BLENDFACTOR_INV_SRC1_ALPHA 0x1A 73 74 #define PIPE_BLEND_ADD 0 75 #define PIPE_BLEND_SUBTRACT 1 76 #define PIPE_BLEND_REVERSE_SUBTRACT 2 77 #define PIPE_BLEND_MIN 3 78 #define PIPE_BLEND_MAX 4 79 80 81 enum pipe_logicop { 82 PIPE_LOGICOP_CLEAR, 83 PIPE_LOGICOP_NOR, 84 PIPE_LOGICOP_AND_INVERTED, 85 PIPE_LOGICOP_COPY_INVERTED, 86 PIPE_LOGICOP_AND_REVERSE, 87 PIPE_LOGICOP_INVERT, 88 PIPE_LOGICOP_XOR, 89 PIPE_LOGICOP_NAND, 90 PIPE_LOGICOP_AND, 91 PIPE_LOGICOP_EQUIV, 92 PIPE_LOGICOP_NOOP, 93 PIPE_LOGICOP_OR_INVERTED, 94 PIPE_LOGICOP_COPY, 95 PIPE_LOGICOP_OR_REVERSE, 96 PIPE_LOGICOP_OR, 97 PIPE_LOGICOP_SET, 98 }; 99 100 #define PIPE_MASK_R 0x1 101 #define PIPE_MASK_G 0x2 102 #define PIPE_MASK_B 0x4 103 #define PIPE_MASK_A 0x8 104 #define PIPE_MASK_RGBA 0xf 105 #define PIPE_MASK_Z 0x10 106 #define PIPE_MASK_S 0x20 107 #define PIPE_MASK_ZS 0x30 108 #define PIPE_MASK_RGBAZS (PIPE_MASK_RGBA|PIPE_MASK_ZS) 109 110 111 /** 112 * Inequality functions. Used for depth test, stencil compare, alpha 113 * test, shadow compare, etc. 114 */ 115 #define PIPE_FUNC_NEVER 0 116 #define PIPE_FUNC_LESS 1 117 #define PIPE_FUNC_EQUAL 2 118 #define PIPE_FUNC_LEQUAL 3 119 #define PIPE_FUNC_GREATER 4 120 #define PIPE_FUNC_NOTEQUAL 5 121 #define PIPE_FUNC_GEQUAL 6 122 #define PIPE_FUNC_ALWAYS 7 123 124 /** Polygon fill mode */ 125 #define PIPE_POLYGON_MODE_FILL 0 126 #define PIPE_POLYGON_MODE_LINE 1 127 #define PIPE_POLYGON_MODE_POINT 2 128 129 /** Polygon face specification, eg for culling */ 130 #define PIPE_FACE_NONE 0 131 #define PIPE_FACE_FRONT 1 132 #define PIPE_FACE_BACK 2 133 #define PIPE_FACE_FRONT_AND_BACK (PIPE_FACE_FRONT | PIPE_FACE_BACK) 134 135 /** Stencil ops */ 136 #define PIPE_STENCIL_OP_KEEP 0 137 #define PIPE_STENCIL_OP_ZERO 1 138 #define PIPE_STENCIL_OP_REPLACE 2 139 #define PIPE_STENCIL_OP_INCR 3 140 #define PIPE_STENCIL_OP_DECR 4 141 #define PIPE_STENCIL_OP_INCR_WRAP 5 142 #define PIPE_STENCIL_OP_DECR_WRAP 6 143 #define PIPE_STENCIL_OP_INVERT 7 144 145 /** Texture types. 146 * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D */ 147 enum pipe_texture_target { 148 PIPE_BUFFER = 0, 149 PIPE_TEXTURE_1D = 1, 150 PIPE_TEXTURE_2D = 2, 151 PIPE_TEXTURE_3D = 3, 152 PIPE_TEXTURE_CUBE = 4, 153 PIPE_TEXTURE_RECT = 5, 154 PIPE_TEXTURE_1D_ARRAY = 6, 155 PIPE_TEXTURE_2D_ARRAY = 7, 156 PIPE_TEXTURE_CUBE_ARRAY = 8, 157 PIPE_MAX_TEXTURE_TYPES 158 }; 159 160 #define PIPE_TEX_FACE_POS_X 0 161 #define PIPE_TEX_FACE_NEG_X 1 162 #define PIPE_TEX_FACE_POS_Y 2 163 #define PIPE_TEX_FACE_NEG_Y 3 164 #define PIPE_TEX_FACE_POS_Z 4 165 #define PIPE_TEX_FACE_NEG_Z 5 166 #define PIPE_TEX_FACE_MAX 6 167 168 #define PIPE_TEX_WRAP_REPEAT 0 169 #define PIPE_TEX_WRAP_CLAMP 1 170 #define PIPE_TEX_WRAP_CLAMP_TO_EDGE 2 171 #define PIPE_TEX_WRAP_CLAMP_TO_BORDER 3 172 #define PIPE_TEX_WRAP_MIRROR_REPEAT 4 173 #define PIPE_TEX_WRAP_MIRROR_CLAMP 5 174 #define PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE 6 175 #define PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER 7 176 177 /* Between mipmaps, ie mipfilter 178 */ 179 #define PIPE_TEX_MIPFILTER_NEAREST 0 180 #define PIPE_TEX_MIPFILTER_LINEAR 1 181 #define PIPE_TEX_MIPFILTER_NONE 2 182 183 /* Within a mipmap, ie min/mag filter 184 */ 185 #define PIPE_TEX_FILTER_NEAREST 0 186 #define PIPE_TEX_FILTER_LINEAR 1 187 188 #define PIPE_TEX_COMPARE_NONE 0 189 #define PIPE_TEX_COMPARE_R_TO_TEXTURE 1 190 191 /** 192 * Clear buffer bits 193 */ 194 #define PIPE_CLEAR_DEPTH (1 << 0) 195 #define PIPE_CLEAR_STENCIL (1 << 1) 196 #define PIPE_CLEAR_COLOR0 (1 << 2) 197 #define PIPE_CLEAR_COLOR1 (1 << 3) 198 #define PIPE_CLEAR_COLOR2 (1 << 4) 199 #define PIPE_CLEAR_COLOR3 (1 << 5) 200 #define PIPE_CLEAR_COLOR4 (1 << 6) 201 #define PIPE_CLEAR_COLOR5 (1 << 7) 202 #define PIPE_CLEAR_COLOR6 (1 << 8) 203 #define PIPE_CLEAR_COLOR7 (1 << 9) 204 /** Combined flags */ 205 /** All color buffers currently bound */ 206 #define PIPE_CLEAR_COLOR (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \ 207 PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \ 208 PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \ 209 PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7) 210 #define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL) 211 212 /** 213 * Transfer object usage flags 214 */ 215 enum pipe_transfer_usage { 216 /** 217 * Resource contents read back (or accessed directly) at transfer 218 * create time. 219 */ 220 PIPE_TRANSFER_READ = (1 << 0), 221 222 /** 223 * Resource contents will be written back at transfer_unmap 224 * time (or modified as a result of being accessed directly). 225 */ 226 PIPE_TRANSFER_WRITE = (1 << 1), 227 228 /** 229 * Read/modify/write 230 */ 231 PIPE_TRANSFER_READ_WRITE = PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE, 232 233 /** 234 * The transfer should map the texture storage directly. The driver may 235 * return NULL if that isn't possible, and the state tracker needs to cope 236 * with that and use an alternative path without this flag. 237 * 238 * E.g. the state tracker could have a simpler path which maps textures and 239 * does read/modify/write cycles on them directly, and a more complicated 240 * path which uses minimal read and write transfers. 241 */ 242 PIPE_TRANSFER_MAP_DIRECTLY = (1 << 2), 243 244 /** 245 * Discards the memory within the mapped region. 246 * 247 * It should not be used with PIPE_TRANSFER_READ. 248 * 249 * See also: 250 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag. 251 */ 252 PIPE_TRANSFER_DISCARD_RANGE = (1 << 8), 253 254 /** 255 * Fail if the resource cannot be mapped immediately. 256 * 257 * See also: 258 * - Direct3D's D3DLOCK_DONOTWAIT flag. 259 * - Mesa3D's MESA_MAP_NOWAIT_BIT flag. 260 * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag. 261 */ 262 PIPE_TRANSFER_DONTBLOCK = (1 << 9), 263 264 /** 265 * Do not attempt to synchronize pending operations on the resource when mapping. 266 * 267 * It should not be used with PIPE_TRANSFER_READ. 268 * 269 * See also: 270 * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag. 271 * - Direct3D's D3DLOCK_NOOVERWRITE flag. 272 * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag. 273 */ 274 PIPE_TRANSFER_UNSYNCHRONIZED = (1 << 10), 275 276 /** 277 * Written ranges will be notified later with 278 * pipe_context::transfer_flush_region. 279 * 280 * It should not be used with PIPE_TRANSFER_READ. 281 * 282 * See also: 283 * - pipe_context::transfer_flush_region 284 * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag. 285 */ 286 PIPE_TRANSFER_FLUSH_EXPLICIT = (1 << 11), 287 288 /** 289 * Discards all memory backing the resource. 290 * 291 * It should not be used with PIPE_TRANSFER_READ. 292 * 293 * This is equivalent to: 294 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_BUFFER_BIT 295 * - BufferData(NULL) on a GL buffer 296 * - Direct3D's D3DLOCK_DISCARD flag. 297 * - WDDM's D3DDDICB_LOCKFLAGS.Discard flag. 298 * - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag 299 * - D3D10's D3D10_MAP_WRITE_DISCARD flag. 300 */ 301 PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE = (1 << 12), 302 303 /** 304 * Allows the resource to be used for rendering while mapped. 305 * 306 * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating 307 * the resource. 308 * 309 * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER) 310 * must be called to ensure the device can see what the CPU has written. 311 */ 312 PIPE_TRANSFER_PERSISTENT = (1 << 13), 313 314 /** 315 * If PERSISTENT is set, this ensures any writes done by the device are 316 * immediately visible to the CPU and vice versa. 317 * 318 * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating 319 * the resource. 320 */ 321 PIPE_TRANSFER_COHERENT = (1 << 14) 322 }; 323 324 /** 325 * Flags for the flush function. 326 */ 327 enum pipe_flush_flags { 328 PIPE_FLUSH_END_OF_FRAME = (1 << 0) 329 }; 330 331 /** 332 * Flags for pipe_context::memory_barrier. 333 */ 334 #define PIPE_BARRIER_MAPPED_BUFFER (1 << 0) 335 #define PIPE_BARRIER_SHADER_BUFFER (1 << 1) 336 #define PIPE_BARRIER_QUERY_BUFFER (1 << 2) 337 #define PIPE_BARRIER_VERTEX_BUFFER (1 << 3) 338 #define PIPE_BARRIER_INDEX_BUFFER (1 << 4) 339 #define PIPE_BARRIER_CONSTANT_BUFFER (1 << 5) 340 #define PIPE_BARRIER_INDIRECT_BUFFER (1 << 6) 341 #define PIPE_BARRIER_TEXTURE (1 << 7) 342 #define PIPE_BARRIER_IMAGE (1 << 8) 343 #define PIPE_BARRIER_FRAMEBUFFER (1 << 9) 344 #define PIPE_BARRIER_STREAMOUT_BUFFER (1 << 10) 345 #define PIPE_BARRIER_GLOBAL_BUFFER (1 << 11) 346 #define PIPE_BARRIER_ALL ((1 << 12) - 1) 347 348 /** 349 * Flags for pipe_context::texture_barrier. 350 */ 351 #define PIPE_TEXTURE_BARRIER_SAMPLER (1 << 0) 352 #define PIPE_TEXTURE_BARRIER_FRAMEBUFFER (1 << 1) 353 354 /* 355 * Resource binding flags -- state tracker must specify in advance all 356 * the ways a resource might be used. 357 */ 358 #define PIPE_BIND_DEPTH_STENCIL (1 << 0) /* create_surface */ 359 #define PIPE_BIND_RENDER_TARGET (1 << 1) /* create_surface */ 360 #define PIPE_BIND_BLENDABLE (1 << 2) /* create_surface */ 361 #define PIPE_BIND_SAMPLER_VIEW (1 << 3) /* create_sampler_view */ 362 #define PIPE_BIND_VERTEX_BUFFER (1 << 4) /* set_vertex_buffers */ 363 #define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */ 364 #define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */ 365 #define PIPE_BIND_DISPLAY_TARGET (1 << 8) /* flush_front_buffer */ 366 #define PIPE_BIND_TRANSFER_WRITE (1 << 9) /* transfer_map */ 367 #define PIPE_BIND_TRANSFER_READ (1 << 10) /* transfer_map */ 368 #define PIPE_BIND_STREAM_OUTPUT (1 << 11) /* set_stream_output_buffers */ 369 #define PIPE_BIND_CURSOR (1 << 16) /* mouse cursor */ 370 #define PIPE_BIND_CUSTOM (1 << 17) /* state-tracker/winsys usages */ 371 #define PIPE_BIND_GLOBAL (1 << 18) /* set_global_binding */ 372 #define PIPE_BIND_SHADER_RESOURCE (1 << 19) /* set_shader_resources */ 373 #define PIPE_BIND_COMPUTE_RESOURCE (1 << 20) /* set_compute_resources */ 374 #define PIPE_BIND_COMMAND_ARGS_BUFFER (1 << 21) /* pipe_draw_info.indirect */ 375 #define PIPE_BIND_QUERY_BUFFER (1 << 22) /* get_query_result_resource */ 376 377 /* The first two flags above were previously part of the amorphous 378 * TEXTURE_USAGE, most of which are now descriptions of the ways a 379 * particular texture can be bound to the gallium pipeline. The two flags 380 * below do not fit within that and probably need to be migrated to some 381 * other place. 382 * 383 * It seems like scanout is used by the Xorg state tracker to ask for 384 * a texture suitable for actual scanout (hence the name), which 385 * implies extra layout constraints on some hardware. It may also 386 * have some special meaning regarding mouse cursor images. 387 * 388 * The shared flag is quite underspecified, but certainly isn't a 389 * binding flag - it seems more like a message to the winsys to create 390 * a shareable allocation. 391 * 392 * The third flag has been added to be able to force textures to be created 393 * in linear mode (no tiling). 394 */ 395 #define PIPE_BIND_SCANOUT (1 << 14) /* */ 396 #define PIPE_BIND_SHARED (1 << 15) /* get_texture_handle ??? */ 397 #define PIPE_BIND_LINEAR (1 << 21) 398 399 400 /* Flags for the driver about resource behaviour: 401 */ 402 #define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0) 403 #define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1) 404 #define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */ 405 #define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */ 406 407 /* Hint about the expected lifecycle of a resource. 408 * Sorted according to GPU vs CPU access. 409 */ 410 #define PIPE_USAGE_DEFAULT 0 /* fast GPU access */ 411 #define PIPE_USAGE_IMMUTABLE 1 /* fast GPU access, immutable */ 412 #define PIPE_USAGE_DYNAMIC 2 /* uploaded data is used multiple times */ 413 #define PIPE_USAGE_STREAM 3 /* uploaded data is used once */ 414 #define PIPE_USAGE_STAGING 4 /* fast CPU access */ 415 416 417 /** 418 * Shaders 419 */ 420 #define PIPE_SHADER_VERTEX 0 421 #define PIPE_SHADER_FRAGMENT 1 422 #define PIPE_SHADER_GEOMETRY 2 423 #define PIPE_SHADER_TESS_CTRL 3 424 #define PIPE_SHADER_TESS_EVAL 4 425 #define PIPE_SHADER_COMPUTE 5 426 #define PIPE_SHADER_TYPES 6 427 428 429 /** 430 * Primitive types: 431 */ 432 #define PIPE_PRIM_POINTS 0 433 #define PIPE_PRIM_LINES 1 434 #define PIPE_PRIM_LINE_LOOP 2 435 #define PIPE_PRIM_LINE_STRIP 3 436 #define PIPE_PRIM_TRIANGLES 4 437 #define PIPE_PRIM_TRIANGLE_STRIP 5 438 #define PIPE_PRIM_TRIANGLE_FAN 6 439 #define PIPE_PRIM_QUADS 7 440 #define PIPE_PRIM_QUAD_STRIP 8 441 #define PIPE_PRIM_POLYGON 9 442 #define PIPE_PRIM_LINES_ADJACENCY 10 443 #define PIPE_PRIM_LINE_STRIP_ADJACENCY 11 444 #define PIPE_PRIM_TRIANGLES_ADJACENCY 12 445 #define PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY 13 446 #define PIPE_PRIM_PATCHES 14 447 #define PIPE_PRIM_MAX 15 448 449 450 /** 451 * Tessellator spacing types 452 */ 453 #define PIPE_TESS_SPACING_FRACTIONAL_ODD 0 454 #define PIPE_TESS_SPACING_FRACTIONAL_EVEN 1 455 #define PIPE_TESS_SPACING_EQUAL 2 456 457 /** 458 * Query object types 459 */ 460 #define PIPE_QUERY_OCCLUSION_COUNTER 0 461 #define PIPE_QUERY_OCCLUSION_PREDICATE 1 462 #define PIPE_QUERY_TIMESTAMP 2 463 #define PIPE_QUERY_TIMESTAMP_DISJOINT 3 464 #define PIPE_QUERY_TIME_ELAPSED 4 465 #define PIPE_QUERY_PRIMITIVES_GENERATED 5 466 #define PIPE_QUERY_PRIMITIVES_EMITTED 6 467 #define PIPE_QUERY_SO_STATISTICS 7 468 #define PIPE_QUERY_SO_OVERFLOW_PREDICATE 8 469 #define PIPE_QUERY_GPU_FINISHED 9 470 #define PIPE_QUERY_PIPELINE_STATISTICS 10 471 #define PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE 11 472 #define PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE 12 473 #define PIPE_QUERY_TYPES 13 474 475 /* start of driver queries, 476 * see pipe_screen::get_driver_query_info */ 477 #define PIPE_QUERY_DRIVER_SPECIFIC 256 478 479 480 /** 481 * Conditional rendering modes 482 */ 483 #define PIPE_RENDER_COND_WAIT 0 484 #define PIPE_RENDER_COND_NO_WAIT 1 485 #define PIPE_RENDER_COND_BY_REGION_WAIT 2 486 #define PIPE_RENDER_COND_BY_REGION_NO_WAIT 3 487 488 489 /** 490 * Point sprite coord modes 491 */ 492 #define PIPE_SPRITE_COORD_UPPER_LEFT 0 493 #define PIPE_SPRITE_COORD_LOWER_LEFT 1 494 495 496 /** 497 * Texture swizzles 498 */ 499 #define PIPE_SWIZZLE_RED 0 500 #define PIPE_SWIZZLE_GREEN 1 501 #define PIPE_SWIZZLE_BLUE 2 502 #define PIPE_SWIZZLE_ALPHA 3 503 #define PIPE_SWIZZLE_ZERO 4 504 #define PIPE_SWIZZLE_ONE 5 505 506 507 #define PIPE_TIMEOUT_INFINITE 0xffffffffffffffffull 508 509 /** 510 * pipe_image_view access flags. 511 */ 512 #define PIPE_IMAGE_ACCESS_READ (1 << 0) 513 #define PIPE_IMAGE_ACCESS_WRITE (1 << 1) 514 #define PIPE_IMAGE_ACCESS_READ_WRITE (PIPE_IMAGE_ACCESS_READ | \ 515 PIPE_IMAGE_ACCESS_WRITE) 516 517 /** 518 * Implementation capabilities/limits which are queried through 519 * pipe_screen::get_param() 520 */ 521 enum pipe_cap { 522 PIPE_CAP_NPOT_TEXTURES = 1, 523 PIPE_CAP_TWO_SIDED_STENCIL = 2, 524 PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS = 4, 525 PIPE_CAP_ANISOTROPIC_FILTER = 5, 526 PIPE_CAP_POINT_SPRITE = 6, 527 PIPE_CAP_MAX_RENDER_TARGETS = 7, 528 PIPE_CAP_OCCLUSION_QUERY = 8, 529 PIPE_CAP_QUERY_TIME_ELAPSED = 9, 530 PIPE_CAP_TEXTURE_SHADOW_MAP = 10, 531 PIPE_CAP_TEXTURE_SWIZZLE = 11, 532 PIPE_CAP_MAX_TEXTURE_2D_LEVELS = 12, 533 PIPE_CAP_MAX_TEXTURE_3D_LEVELS = 13, 534 PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS = 14, 535 PIPE_CAP_TEXTURE_MIRROR_CLAMP = 25, 536 PIPE_CAP_BLEND_EQUATION_SEPARATE = 28, 537 PIPE_CAP_SM3 = 29, /*< Shader Model, supported */ 538 PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS = 30, 539 PIPE_CAP_PRIMITIVE_RESTART = 31, 540 /** blend enables and write masks per rendertarget */ 541 PIPE_CAP_INDEP_BLEND_ENABLE = 33, 542 /** different blend funcs per rendertarget */ 543 PIPE_CAP_INDEP_BLEND_FUNC = 34, 544 PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS = 36, 545 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT = 37, 546 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT = 38, 547 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER = 39, 548 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER = 40, 549 PIPE_CAP_DEPTH_CLIP_DISABLE = 41, 550 PIPE_CAP_SHADER_STENCIL_EXPORT = 42, 551 PIPE_CAP_TGSI_INSTANCEID = 43, 552 PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR = 44, 553 PIPE_CAP_FRAGMENT_COLOR_CLAMPED = 45, 554 PIPE_CAP_MIXED_COLORBUFFER_FORMATS = 46, 555 PIPE_CAP_SEAMLESS_CUBE_MAP = 47, 556 PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE = 48, 557 PIPE_CAP_MIN_TEXEL_OFFSET = 50, 558 PIPE_CAP_MAX_TEXEL_OFFSET = 51, 559 PIPE_CAP_CONDITIONAL_RENDER = 52, 560 PIPE_CAP_TEXTURE_BARRIER = 53, 561 PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS = 55, 562 PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS = 56, 563 PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME = 57, 564 PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS = 59, /* temporary */ 565 PIPE_CAP_VERTEX_COLOR_UNCLAMPED = 60, 566 PIPE_CAP_VERTEX_COLOR_CLAMPED = 61, 567 PIPE_CAP_GLSL_FEATURE_LEVEL = 62, 568 PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION = 63, 569 PIPE_CAP_USER_VERTEX_BUFFERS = 64, 570 PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY = 65, 571 PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY = 66, 572 PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY = 67, 573 PIPE_CAP_COMPUTE = 68, 574 PIPE_CAP_USER_INDEX_BUFFERS = 69, 575 PIPE_CAP_USER_CONSTANT_BUFFERS = 70, 576 PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT = 71, 577 PIPE_CAP_START_INSTANCE = 72, 578 PIPE_CAP_QUERY_TIMESTAMP = 73, 579 PIPE_CAP_TEXTURE_MULTISAMPLE = 74, 580 PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT = 75, 581 PIPE_CAP_CUBE_MAP_ARRAY = 76, 582 PIPE_CAP_TEXTURE_BUFFER_OBJECTS = 77, 583 PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT = 78, 584 PIPE_CAP_TGSI_TEXCOORD = 79, 585 PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 80, 586 PIPE_CAP_QUERY_PIPELINE_STATISTICS = 81, 587 PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK = 82, 588 PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE = 83, 589 PIPE_CAP_MAX_VIEWPORTS = 84, 590 PIPE_CAP_ENDIANNESS = 85, 591 PIPE_CAP_MIXED_FRAMEBUFFER_SIZES = 86, 592 PIPE_CAP_TGSI_VS_LAYER_VIEWPORT = 87, 593 PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES = 88, 594 PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS = 89, 595 PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS = 90, 596 PIPE_CAP_TEXTURE_GATHER_SM5 = 91, 597 PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT = 92, 598 PIPE_CAP_FAKE_SW_MSAA = 93, 599 PIPE_CAP_TEXTURE_QUERY_LOD = 94, 600 PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET = 95, 601 PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET = 96, 602 PIPE_CAP_SAMPLE_SHADING = 97, 603 PIPE_CAP_TEXTURE_GATHER_OFFSETS = 98, 604 PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION = 99, 605 PIPE_CAP_MAX_VERTEX_STREAMS = 100, 606 PIPE_CAP_DRAW_INDIRECT = 101, 607 PIPE_CAP_TGSI_FS_FINE_DERIVATIVE = 102, 608 PIPE_CAP_VENDOR_ID = 103, 609 PIPE_CAP_DEVICE_ID = 104, 610 PIPE_CAP_ACCELERATED = 105, 611 PIPE_CAP_VIDEO_MEMORY = 106, 612 PIPE_CAP_UMA = 107, 613 PIPE_CAP_CONDITIONAL_RENDER_INVERTED = 108, 614 PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE = 109, 615 PIPE_CAP_SAMPLER_VIEW_TARGET = 110, 616 PIPE_CAP_CLIP_HALFZ = 111, 617 PIPE_CAP_VERTEXID_NOBASE = 112, 618 PIPE_CAP_POLYGON_OFFSET_CLAMP = 113, 619 }; 620 621 #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0) 622 #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1) 623 624 enum pipe_endian { 625 PIPE_ENDIAN_LITTLE = 0, 626 PIPE_ENDIAN_BIG = 1, 627 #if defined(PIPE_ARCH_LITTLE_ENDIAN) 628 PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_LITTLE 629 #elif defined(PIPE_ARCH_BIG_ENDIAN) 630 PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_BIG 631 #endif 632 }; 633 634 /** 635 * Implementation limits which are queried through 636 * pipe_screen::get_paramf() 637 */ 638 enum pipe_capf 639 { 640 PIPE_CAPF_MAX_LINE_WIDTH, 641 PIPE_CAPF_MAX_LINE_WIDTH_AA, 642 PIPE_CAPF_MAX_POINT_WIDTH, 643 PIPE_CAPF_MAX_POINT_WIDTH_AA, 644 PIPE_CAPF_MAX_TEXTURE_ANISOTROPY, 645 PIPE_CAPF_MAX_TEXTURE_LOD_BIAS, 646 PIPE_CAPF_GUARD_BAND_LEFT, 647 PIPE_CAPF_GUARD_BAND_TOP, 648 PIPE_CAPF_GUARD_BAND_RIGHT, 649 PIPE_CAPF_GUARD_BAND_BOTTOM 650 }; 651 652 /* Shader caps not specific to any single stage */ 653 enum pipe_shader_cap 654 { 655 PIPE_SHADER_CAP_MAX_INSTRUCTIONS, /* if 0, it means the stage is unsupported */ 656 PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS, 657 PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS, 658 PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS, 659 PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH, 660 PIPE_SHADER_CAP_MAX_INPUTS, 661 PIPE_SHADER_CAP_MAX_OUTPUTS, 662 PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE, 663 PIPE_SHADER_CAP_MAX_CONST_BUFFERS, 664 PIPE_SHADER_CAP_MAX_TEMPS, 665 PIPE_SHADER_CAP_MAX_PREDS, 666 /* boolean caps */ 667 PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED, 668 PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR, 669 PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR, 670 PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR, 671 PIPE_SHADER_CAP_INDIRECT_CONST_ADDR, 672 PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */ 673 PIPE_SHADER_CAP_INTEGERS, 674 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS, 675 PIPE_SHADER_CAP_PREFERRED_IR, 676 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED, 677 PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS, 678 PIPE_SHADER_CAP_DOUBLES 679 }; 680 681 /** 682 * Shader intermediate representation. 683 */ 684 enum pipe_shader_ir 685 { 686 PIPE_SHADER_IR_TGSI, 687 PIPE_SHADER_IR_LLVM, 688 PIPE_SHADER_IR_NATIVE 689 }; 690 691 /** 692 * Compute-specific implementation capability. They can be queried 693 * using pipe_screen::get_compute_param. 694 */ 695 enum pipe_compute_cap 696 { 697 PIPE_COMPUTE_CAP_IR_TARGET, 698 PIPE_COMPUTE_CAP_GRID_DIMENSION, 699 PIPE_COMPUTE_CAP_MAX_GRID_SIZE, 700 PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE, 701 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, 702 PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE, 703 PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE, 704 PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE, 705 PIPE_COMPUTE_CAP_MAX_INPUT_SIZE, 706 PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, 707 PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY, 708 PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS, 709 PIPE_COMPUTE_CAP_IMAGES_SUPPORTED 710 }; 711 712 /** 713 * Composite query types 714 */ 715 716 /** 717 * Query result for PIPE_QUERY_SO_STATISTICS. 718 */ 719 struct pipe_query_data_so_statistics 720 { 721 uint64_t num_primitives_written; 722 uint64_t primitives_storage_needed; 723 }; 724 725 /** 726 * Query result for PIPE_QUERY_TIMESTAMP_DISJOINT. 727 */ 728 struct pipe_query_data_timestamp_disjoint 729 { 730 uint64_t frequency; 731 boolean disjoint; 732 }; 733 734 /** 735 * Query result for PIPE_QUERY_PIPELINE_STATISTICS. 736 */ 737 struct pipe_query_data_pipeline_statistics 738 { 739 uint64_t ia_vertices; /**< Num vertices read by the vertex fetcher. */ 740 uint64_t ia_primitives; /**< Num primitives read by the vertex fetcher. */ 741 uint64_t vs_invocations; /**< Num vertex shader invocations. */ 742 uint64_t gs_invocations; /**< Num geometry shader invocations. */ 743 uint64_t gs_primitives; /**< Num primitives output by a geometry shader. */ 744 uint64_t c_invocations; /**< Num primitives sent to the rasterizer. */ 745 uint64_t c_primitives; /**< Num primitives that were rendered. */ 746 uint64_t ps_invocations; /**< Num pixel shader invocations. */ 747 uint64_t hs_invocations; /**< Num hull shader invocations. */ 748 uint64_t ds_invocations; /**< Num domain shader invocations. */ 749 uint64_t cs_invocations; /**< Num compute shader invocations. */ 750 }; 751 752 /** 753 * Query result (returned by pipe_context::get_query_result). 754 */ 755 union pipe_query_result 756 { 757 /* PIPE_QUERY_OCCLUSION_PREDICATE */ 758 /* PIPE_QUERY_SO_OVERFLOW_PREDICATE */ 759 /* PIPE_QUERY_GPU_FINISHED */ 760 boolean b; 761 762 /* PIPE_QUERY_OCCLUSION_COUNTER */ 763 /* PIPE_QUERY_TIMESTAMP */ 764 /* PIPE_QUERY_TIME_ELAPSED */ 765 /* PIPE_QUERY_PRIMITIVES_GENERATED */ 766 /* PIPE_QUERY_PRIMITIVES_EMITTED */ 767 uint64_t u64; 768 769 /* PIPE_QUERY_SO_STATISTICS */ 770 struct pipe_query_data_so_statistics so_statistics; 771 772 /* PIPE_QUERY_TIMESTAMP_DISJOINT */ 773 struct pipe_query_data_timestamp_disjoint timestamp_disjoint; 774 775 /* PIPE_QUERY_PIPELINE_STATISTICS */ 776 struct pipe_query_data_pipeline_statistics pipeline_statistics; 777 }; 778 779 enum pipe_query_value_type 780 { 781 PIPE_QUERY_TYPE_I32, 782 PIPE_QUERY_TYPE_U32, 783 PIPE_QUERY_TYPE_I64, 784 PIPE_QUERY_TYPE_U64, 785 }; 786 787 union pipe_color_union 788 { 789 float f[4]; 790 int i[4]; 791 unsigned int ui[4]; 792 }; 793 794 struct pipe_driver_query_info 795 { 796 const char *name; 797 unsigned query_type; /* PIPE_QUERY_DRIVER_SPECIFIC + i */ 798 uint64_t max_value; /* max value that can be returned */ 799 boolean uses_byte_units; /* whether the result is in bytes */ 800 }; 801 802 #ifdef __cplusplus 803 } 804 #endif 805 806 #endif 807