Searched refs:PIPE_CONTROL_DEPTH_CACHE_FLUSH (Results 1 – 14 of 14) sorted by relevance
162 PIPE_CONTROL_DEPTH_CACHE_FLUSH))); in genX()181 if (GEN_VERSIONx10 < 75 && (flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH)) { in genX()361 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in genX()449 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in genX()481 pc.DepthCacheFlushEnable = flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH; in genX()
65 PIPE_CONTROL_DEPTH_CACHE_FLUSH = (1 << 24), enumerator69 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_DATA_CACHE_FLUSH | \
152 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in gen8_write_pma_stall_bits()166 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in gen8_write_pma_stall_bits()
106 brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH); in brw_emit_depth_stall_flushes()366 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in brw_emit_mi_flush()
533 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in brw_emit_select_pipeline()784 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in brw_upload_state_base_address()
1617 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_hiz_exec()1642 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_hiz_exec()1675 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_hiz_exec()1692 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_hiz_exec()
314 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in intel_texture_barrier()
1022 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in flush_depth_and_render_caches()
192 [IRIS_DOMAIN_DEPTH_WRITE] = PIPE_CONTROL_DEPTH_CACHE_FLUSH, in iris_emit_buffer_barrier_for()198 [IRIS_DOMAIN_DEPTH_WRITE] = PIPE_CONTROL_DEPTH_CACHE_FLUSH, in iris_emit_buffer_barrier_for()293 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in iris_flush_all_caches()313 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in iris_texture_barrier()
69 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in iris_fine_fence_new()
319 PIPE_CONTROL_DEPTH_CACHE_FLUSH = (1 << 24), enumerator325 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | \
557 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in iris_hiz_exec()596 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in iris_hiz_exec()
411 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in flush_before_state_base_change()657 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in emit_pipeline_select()1618 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in genX()1639 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in genX()6126 PIPE_CONTROL_DEPTH_CACHE_FLUSH); in iris_upload_dirty_render_state()7096 if ((flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH)) in batch_mark_sync_for_pipe_control()7110 if ((flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH)) in batch_mark_sync_for_pipe_control()7402 (flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH))) { in iris_emit_raw_pipe_control()7436 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in iris_emit_raw_pipe_control()7498 PIPE_CONTROL_DEPTH_CACHE_FLUSH | in iris_emit_raw_pipe_control()[all …]
81 #define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) macro