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Searched refs:PIPE_CONTROL_TLB_INVALIDATE (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
DgenX_pipe_control.c315 if (IS_GENx10_BETWEEN(60, 75) && (flags & PIPE_CONTROL_TLB_INVALIDATE)) { in genX()
326 if (GEN_GEN >= 7 && (flags & PIPE_CONTROL_TLB_INVALIDATE)) { in genX()
476 pc.TLBInvalidate = flags & PIPE_CONTROL_TLB_INVALIDATE; in genX()
Dbrw_pipe_control.h48 PIPE_CONTROL_TLB_INVALIDATE = (1 << 7), enumerator
/external/mesa3d/src/gallium/drivers/iris/
Diris_context.h302 PIPE_CONTROL_TLB_INVALIDATE = (1 << 7), enumerator
Diris_state.c7384 if (flags & PIPE_CONTROL_TLB_INVALIDATE) { in iris_emit_raw_pipe_control()
7534 (flags & PIPE_CONTROL_TLB_INVALIDATE) ? "TLB " : "", in iris_emit_raw_pipe_control()
7566 pc.TLBInvalidate = flags & PIPE_CONTROL_TLB_INVALIDATE; in iris_emit_raw_pipe_control()
/external/igt-gpu-tools/tests/
Dperf.c61 #define PIPE_CONTROL_TLB_INVALIDATE (1 << 18) macro