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Searched refs:PI_REG (Results 1 – 3 of 3) sorted by relevance

/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
Dsuspend.c224 mmio_clrsetbits_32(PI_REG(ch, 100), 0x3 << 8, 0x2 << 8); in data_training()
227 mmio_clrsetbits_32(PI_REG(ch, 92), in data_training()
232 tmp = mmio_read_32(PI_REG(ch, 174)) >> 8; in data_training()
255 mmio_write_32(PI_REG(ch, 175), 0x00003f7c); in data_training()
257 mmio_clrbits_32(PI_REG(ch, 100), 0x3 << 8); in data_training()
265 mmio_clrsetbits_32(PI_REG(ch, 60), 0x3 << 8, 0x2 << 8); in data_training()
267 mmio_clrsetbits_32(PI_REG(ch, 59), in data_training()
273 tmp = mmio_read_32(PI_REG(ch, 174)) >> 8; in data_training()
300 mmio_write_32(PI_REG(ch, 175), 0x00003f7c); in data_training()
303 mmio_clrbits_32(PI_REG(ch, 60), 0x3 << 8); in data_training()
[all …]
Ddfs.c1034 mmio_write_32(PI_REG(i, 2), tmp); in gen_rk3399_pi_params_f0()
1037 mmio_clrsetbits_32(PI_REG(i, 3), 0xffff, tmp); in gen_rk3399_pi_params_f0()
1039 mmio_clrsetbits_32(PI_REG(i, 7), 0xffffu << 16, tmp << 16); in gen_rk3399_pi_params_f0()
1049 mmio_clrsetbits_32(PI_REG(i, 42), 0xff, tmp); in gen_rk3399_pi_params_f0()
1053 mmio_clrsetbits_32(PI_REG(i, 43), 0x1f, tmp); in gen_rk3399_pi_params_f0()
1056 mmio_clrsetbits_32(PI_REG(i, 43), 0x3f << 8, in gen_rk3399_pi_params_f0()
1060 mmio_clrsetbits_32(PI_REG(i, 43), 0x7f << 16, in gen_rk3399_pi_params_f0()
1063 mmio_clrsetbits_32(PI_REG(i, 46), 0xffffu << 16, in gen_rk3399_pi_params_f0()
1066 mmio_clrsetbits_32(PI_REG(i, 46), 0x3ff, pdram_timing->trfc); in gen_rk3399_pi_params_f0()
1070 mmio_clrsetbits_32(PI_REG(i, 66), 0xffu << 24, in gen_rk3399_pi_params_f0()
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/external/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
Daddressmap_shared.h96 #define PI_REG(ch, n) (PI_BASE(ch) + (n) * 0x4) macro