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Searched refs:PKT3_SET_SH_REG (Results 1 – 11 of 11) sorted by relevance

/external/libdrm/tests/amdgpu/
Dbasic_tests.c288 #define PKT3_SET_SH_REG 0x76 macro
2150 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2); in amdgpu_sync_dependency_test()
2156 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2); in amdgpu_sync_dependency_test()
2196 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 1); in amdgpu_sync_dependency_test()
2200 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2); in amdgpu_sync_dependency_test()
2205 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 1); in amdgpu_sync_dependency_test()
2209 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 3); in amdgpu_sync_dependency_test()
2382 ptr[i++] = PACKET3_COMPUTE(PKT3_SET_SH_REG, 3); in amdgpu_dispatch_init()
2387 ptr[i++] = PACKET3_COMPUTE(PKT3_SET_SH_REG, 1); in amdgpu_dispatch_init()
2400 ptr[i++] = PACKET3_COMPUTE(PKT3_SET_SH_REG, 2); in amdgpu_dispatch_write_cumask()
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/external/mesa3d/src/amd/vulkan/
Dradv_cs.h102 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0)); in radeon_set_sh_reg_seq()
123 opcode = PKT3_SET_SH_REG; in radeon_set_sh_reg_idx()
Dradv_private.h1589 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, pointer_count * (use_32bit_pointers ? 1 : 2), 0)); in radv_emit_shader_pointer_head()
/external/mesa3d/src/gallium/drivers/r600/
Dr600d_common.h87 #define PKT3_SET_SH_REG 0x76 /* SI and later */ macro
Dr600_cs.h174 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0)); in radeon_set_sh_reg_seq()
Deg_debug.c165 op == PKT3_SET_SH_REG) in ac_parse_packet3()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_pm4.c62 opcode = PKT3_SET_SH_REG; in si_pm4_set_reg()
Dsi_build_pm4.h95 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0)); in radeon_set_sh_reg_seq()
Dsi_descriptors.c1961 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, pointer_count, 0)); in si_emit_shader_pointer_head()
/external/mesa3d/src/amd/common/
Dsid.h216 #define PKT3_SET_SH_REG 0x76 macro
Dac_debug.c256 op == PKT3_SET_UCONFIG_REG_INDEX || op == PKT3_SET_SH_REG) in ac_parse_packet3()
275 case PKT3_SET_SH_REG: in ac_parse_packet3()