Searched refs:PLAT_MARVELL_MAILBOX_BASE (Results 1 – 9 of 9) sorted by relevance
26 uintptr_t *mailbox = (void *)PLAT_MARVELL_MAILBOX_BASE; in marvell_program_mailbox()32 assert((PLAT_MARVELL_MAILBOX_BASE >= MARVELL_SHARED_RAM_BASE) && in marvell_program_mailbox()33 ((PLAT_MARVELL_MAILBOX_BASE + sizeof(*mailbox)) <= in marvell_program_mailbox()41 flush_dcache_range((uintptr_t)PLAT_MARVELL_MAILBOX_BASE + in marvell_program_mailbox()
25 uintptr_t *mailbox = (void *)PLAT_MARVELL_MAILBOX_BASE; in mailbox_clean()33 uintptr_t *mailbox = (void *)PLAT_MARVELL_MAILBOX_BASE; in exec_ble_main()
614 uintptr_t *mailbox = (void *)PLAT_MARVELL_MAILBOX_BASE; in a8k_pwr_domain_suspend()627 flush_dcache_range(PLAT_MARVELL_MAILBOX_BASE + in a8k_pwr_domain_suspend()686 uintptr_t *mailbox = (void *)PLAT_MARVELL_MAILBOX_BASE; in a8k_pwr_domain_suspend_finish()704 flush_dcache_range(PLAT_MARVELL_MAILBOX_BASE + in a8k_pwr_domain_suspend_finish()
101 uintptr_t *mailbox = (void *)PLAT_MARVELL_MAILBOX_BASE; in bl31_plat_arch_setup()
40 mov_imm x0, PLAT_MARVELL_MAILBOX_BASE
42 mov_imm x0, PLAT_MARVELL_MAILBOX_BASE
192 #define PLAT_MARVELL_MAILBOX_BASE (MARVELL_SHARED_RAM_BASE \ macro
182 #define PLAT_MARVELL_MAILBOX_BASE (MARVELL_SHARED_RAM_BASE + 0x400) macro
778 mmio_write_32(PLAT_MARVELL_MAILBOX_BASE, 0x0); in a3700_system_reset()784 flush_dcache_range((uintptr_t)PLAT_MARVELL_MAILBOX_BASE, in a3700_system_reset()