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Searched refs:PMULUDQ (Results 1 – 17 of 17) sorted by relevance

/external/llvm/test/Analysis/CostModel/X86/
Darith.ll68 ; 3 PMULUDQ and 2 PADDS and 4 shifts.
/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h295 X86_INTRINSIC_DATA(avx2_pmulu_dq, INTR_TYPE_2OP, X86ISD::PMULUDQ, 0),
1207 X86ISD::PMULUDQ, 0),
1209 X86ISD::PMULUDQ, 0),
1211 X86ISD::PMULUDQ, 0),
1901 X86_INTRINSIC_DATA(sse2_pmulu_dq, INTR_TYPE_2OP, X86ISD::PMULUDQ, 0),
DX86ISelLowering.h463 PMULUDQ, enumerator
DX86InstrFragmentsSIMD.td291 def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
DX86ISelLowering.cpp19391 SDValue Evens = DAG.getNode(X86ISD::PMULUDQ, dl, MVT::v2i64, A, B); in LowerMUL()
19393 SDValue Odds = DAG.getNode(X86ISD::PMULUDQ, dl, MVT::v2i64, Aodds, Bodds); in LowerMUL()
19431 SDValue AloBlo = DAG.getNode(X86ISD::PMULUDQ, dl, VT, A, B); in LowerMUL()
19434 AhiBlo = DAG.getNode(X86ISD::PMULUDQ, dl, VT, Ahi, B); in LowerMUL()
19438 AloBhi = DAG.getNode(X86ISD::PMULUDQ, dl, VT, A, Bhi); in LowerMUL()
19664 (!IsSigned || !Subtarget.hasSSE41()) ? X86ISD::PMULUDQ : X86ISD::PMULDQ; in LowerMUL_LOHI()
22262 case X86ISD::PMULUDQ: return "X86ISD::PMULUDQ"; in getTargetNodeName()
DX86InstrSSE.td4035 defm PMULUDQ : PDI_binop_rm2<0xF4, "pmuludq", X86pmuludq, v2i64, v4i32, VR128,
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h527 PMULUDQ, enumerator
DX86InstrFragmentsSIMD.td305 def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
DX86ISelLowering.cpp27070 SDValue Evens = DAG.getNode(X86ISD::PMULUDQ, dl, MVT::v2i64, in LowerMUL()
27074 SDValue Odds = DAG.getNode(X86ISD::PMULUDQ, dl, MVT::v2i64, in LowerMUL()
27116 AloBlo = DAG.getNode(X86ISD::PMULUDQ, dl, VT, A, B); in LowerMUL()
27121 AloBhi = DAG.getNode(X86ISD::PMULUDQ, dl, VT, A, Bhi); in LowerMUL()
27127 AhiBlo = DAG.getNode(X86ISD::PMULUDQ, dl, VT, Ahi, B); in LowerMUL()
27182 (IsSigned && Subtarget.hasSSE41()) ? X86ISD::PMULDQ : X86ISD::PMULUDQ; in LowerMULH()
28370 SDValue Res02 = DAG.getNode(X86ISD::PMULUDQ, DL, MVT::v2i64, in LowerRotate()
28373 SDValue Res13 = DAG.getNode(X86ISD::PMULUDQ, DL, MVT::v2i64, in LowerRotate()
30940 NODE_NAME_CASE(PMULUDQ) in getTargetNodeName()
31218 case X86ISD::PMULUDQ: in isCommutativeBinOp()
[all …]
DX86InstrSSE.td3479 defm PMULUDQ : PDI_binop_all<0xF4, "pmuludq", X86pmuludq, v2i64, v4i64,
/external/llvm-project/llvm/test/Transforms/InstCombine/X86/
Dx86-muldq.ll157 ; PMULUDQ/PMULDQ - only the even elements (0, 2, 4, 6) of the vXi32 inputs are required.
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h449 PMULUDQ, enumerator
DX86InstrFragmentsSIMD.td296 def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
DX86ISelLowering.cpp25956 SDValue Evens = DAG.getNode(X86ISD::PMULUDQ, dl, MVT::v2i64, in LowerMUL()
25960 SDValue Odds = DAG.getNode(X86ISD::PMULUDQ, dl, MVT::v2i64, in LowerMUL()
26002 AloBlo = DAG.getNode(X86ISD::PMULUDQ, dl, VT, A, B); in LowerMUL()
26007 AloBhi = DAG.getNode(X86ISD::PMULUDQ, dl, VT, A, Bhi); in LowerMUL()
26013 AhiBlo = DAG.getNode(X86ISD::PMULUDQ, dl, VT, Ahi, B); in LowerMUL()
26065 (IsSigned && Subtarget.hasSSE41()) ? X86ISD::PMULDQ : X86ISD::PMULUDQ; in LowerMULH()
27277 SDValue Res02 = DAG.getNode(X86ISD::PMULUDQ, DL, MVT::v2i64, in LowerRotate()
27280 SDValue Res13 = DAG.getNode(X86ISD::PMULUDQ, DL, MVT::v2i64, in LowerRotate()
29797 case X86ISD::PMULUDQ: return "X86ISD::PMULUDQ"; in getTargetNodeName()
30059 case X86ISD::PMULUDQ: in isCommutativeBinOp()
[all …]
DX86InstrSSE.td3474 defm PMULUDQ : PDI_binop_all<0xF4, "pmuludq", X86pmuludq, v2i64, v4i64,
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Darith.ll1147 ; 3 PMULUDQ and 2 PADDS and 4 shifts.
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc13087 // FastEmit functions for X86ISD::PMULUDQ.
15194 …case X86ISD::PMULUDQ: return fastEmit_X86ISD_PMULUDQ_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);