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Searched refs:PSTATE_ID_SOC_POWERDN (Results 1 – 9 of 9) sorted by relevance

/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/
Dplat_psci_handlers.c68 case PSTATE_ID_SOC_POWERDN: in tegra_soc_validate_power_state()
176 (target == PSTATE_ID_SOC_POWERDN)) { in tegra_soc_get_target_pwr_state()
179 target = PSTATE_ID_SOC_POWERDN; in tegra_soc_get_target_pwr_state()
206 if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { in tegra_soc_pwr_domain_suspend()
209 (stateid_afflvl0 == PSTATE_ID_SOC_POWERDN)); in tegra_soc_pwr_domain_suspend()
211 (stateid_afflvl1 == PSTATE_ID_SOC_POWERDN)); in tegra_soc_pwr_domain_suspend()
350 if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { in tegra_soc_pwr_domain_power_down_wfi()
/external/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_pm.c41 req_state->pwr_domain_state[i] = PSTATE_ID_SOC_POWERDN; in tegra_get_sys_suspend_power_state()
139 PSTATE_ID_SOC_POWERDN) { in tegra_pwr_domain_power_down_wfi()
162 PSTATE_ID_SOC_POWERDN) { in tegra_pwr_domain_on_finish()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_psci_handlers.c135 if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { in tegra_soc_pwr_domain_suspend()
250 if ((lvl == (uint32_t)MPIDR_AFFLVL2) && (states[cpu] == PSTATE_ID_SOC_POWERDN)) { in tegra_soc_get_target_pwr_state()
251 target = PSTATE_ID_SOC_POWERDN; in tegra_soc_get_target_pwr_state()
274 if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { in tegra_soc_pwr_domain_power_down_wfi()
368 if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { in tegra_soc_pwr_domain_on_finish()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_psci_handlers.c127 } else if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { in tegra_soc_pwr_domain_suspend()
266 (states[cpu] == PSTATE_ID_SOC_POWERDN)) { in tegra_soc_get_target_pwr_state()
267 target = PSTATE_ID_SOC_POWERDN; in tegra_soc_get_target_pwr_state()
291 if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { in tegra_soc_pwr_domain_power_down_wfi()
409 if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { in tegra_soc_pwr_domain_on_finish()
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t132/
Dtegra_def.h22 #define PSTATE_ID_SOC_POWERDN U(0xD) macro
31 #define PLAT_MAX_OFF_STATE (PSTATE_ID_SOC_POWERDN + U(1))
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t210/
Dtegra_def.h23 #define PSTATE_ID_SOC_POWERDN U(27) macro
29 #define PLAT_SYS_SUSPEND_STATE_ID PSTATE_ID_SOC_POWERDN
38 #define PLAT_MAX_OFF_STATE (PSTATE_ID_SOC_POWERDN + U(1))
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/
Dplat_psci_handlers.c74 if ((state_id != PSTATE_ID_SOC_POWERDN) || (cpu != 0)) { in tegra_soc_validate_power_state()
85 PSTATE_ID_SOC_POWERDN; in tegra_soc_validate_power_state()
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t186/
Dtegra_def.h55 #define PSTATE_ID_SOC_POWERDN U(2) macro
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t194/
Dtegra_def.h36 #define PSTATE_ID_SOC_POWERDN U(2) macro