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Searched refs:PassRegistry (Results 1 – 25 of 1294) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/
DInitializePasses.h19 class PassRegistry; variable
22 void initializeCore(PassRegistry&);
25 void initializeTransformUtils(PassRegistry&);
28 void initializeScalarOpts(PassRegistry&);
31 void initializeObjCARCOpts(PassRegistry&);
34 void initializeVectorization(PassRegistry&);
37 void initializeInstCombine(PassRegistry&);
40 void initializeAggressiveInstCombine(PassRegistry&);
43 void initializeIPO(PassRegistry&);
46 void initializeInstrumentation(PassRegistry&);
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/external/llvm-project/llvm/include/llvm/
DInitializePasses.h19 class PassRegistry; variable
22 void initializeCore(PassRegistry&);
25 void initializeTransformUtils(PassRegistry&);
28 void initializeScalarOpts(PassRegistry&);
31 void initializeObjCARCOpts(PassRegistry&);
34 void initializeVectorization(PassRegistry&);
37 void initializeInstCombine(PassRegistry&);
40 void initializeAggressiveInstCombine(PassRegistry&);
43 void initializeIPO(PassRegistry&);
46 void initializeInstrumentation(PassRegistry&);
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/external/llvm/include/llvm/
DInitializePasses.h20 class PassRegistry; variable
23 void initializeCore(PassRegistry&);
26 void initializeTransformUtils(PassRegistry&);
29 void initializeScalarOpts(PassRegistry&);
32 void initializeObjCARCOpts(PassRegistry&);
35 void initializeVectorization(PassRegistry&);
38 void initializeInstCombine(PassRegistry&);
41 void initializeIPO(PassRegistry&);
44 void initializeInstrumentation(PassRegistry&);
47 void initializeAnalysis(PassRegistry&);
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/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPU.h28 class PassRegistry; variable
32 void initializeAMDGPUPreLegalizerCombinerPass(PassRegistry &);
34 void initializeAMDGPUPostLegalizerCombinerPass(PassRegistry &);
37 void initializeAMDGPURegBankCombinerPass(PassRegistry &);
78 void initializeAMDGPUDAGToDAGISelPass(PassRegistry&);
80 void initializeAMDGPUMachineCFGStructurizerPass(PassRegistry&);
83 void initializeAMDGPUAlwaysInlinePass(PassRegistry&);
86 void initializeAMDGPUAnnotateKernelFeaturesPass(PassRegistry &);
90 void initializeAMDGPUAtomicOptimizerPass(PassRegistry &);
94 void initializeAMDGPULowerIntrinsicsPass(PassRegistry &);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPU.h27 class PassRegistry; variable
68 void initializeAMDGPUDAGToDAGISelPass(PassRegistry&);
70 void initializeAMDGPUMachineCFGStructurizerPass(PassRegistry&);
73 void initializeAMDGPUAlwaysInlinePass(PassRegistry&);
76 void initializeAMDGPUAnnotateKernelFeaturesPass(PassRegistry &);
80 void initializeAMDGPUAtomicOptimizerPass(PassRegistry &);
84 void initializeAMDGPULowerIntrinsicsPass(PassRegistry &);
88 void initializeAMDGPUFixFunctionBitcastsPass(PassRegistry &);
92 void initializeAMDGPULowerKernelArgumentsPass(PassRegistry &);
96 void initializeAMDGPULowerKernelAttributesPass(PassRegistry &);
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/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64.h68 void initializeAArch64A53Fix835769Pass(PassRegistry&);
69 void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
70 void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
71 void initializeAArch64BranchTargetsPass(PassRegistry&);
72 void initializeAArch64CollectLOHPass(PassRegistry&);
73 void initializeAArch64CondBrTuningPass(PassRegistry &);
74 void initializeAArch64CompressJumpTablesPass(PassRegistry&);
75 void initializeAArch64ConditionalComparesPass(PassRegistry&);
76 void initializeAArch64ConditionOptimizerPass(PassRegistry&);
77 void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry&);
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/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssembly.h59 void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &);
60 void initializeWebAssemblyLowerEmscriptenEHSjLjPass(PassRegistry &);
61 void initializeLowerGlobalDtorsPass(PassRegistry &);
62 void initializeFixFunctionBitcastsPass(PassRegistry &);
63 void initializeOptimizeReturnedPass(PassRegistry &);
64 void initializeWebAssemblyArgumentMovePass(PassRegistry &);
65 void initializeWebAssemblySetP2AlignOperandsPass(PassRegistry &);
66 void initializeWebAssemblyReplacePhysRegsPass(PassRegistry &);
67 void initializeWebAssemblyPrepareForLiveIntervalsPass(PassRegistry &);
68 void initializeWebAssemblyOptimizeLiveIntervalsPass(PassRegistry &);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssembly.h58 void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &);
59 void initializeWebAssemblyLowerEmscriptenEHSjLjPass(PassRegistry &);
60 void initializeLowerGlobalDtorsPass(PassRegistry &);
61 void initializeFixFunctionBitcastsPass(PassRegistry &);
62 void initializeOptimizeReturnedPass(PassRegistry &);
63 void initializeWebAssemblyArgumentMovePass(PassRegistry &);
64 void initializeWebAssemblySetP2AlignOperandsPass(PassRegistry &);
65 void initializeWebAssemblyReplacePhysRegsPass(PassRegistry &);
66 void initializeWebAssemblyPrepareForLiveIntervalsPass(PassRegistry &);
67 void initializeWebAssemblyOptimizeLiveIntervalsPass(PassRegistry &);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64.h62 void initializeAArch64A53Fix835769Pass(PassRegistry&);
63 void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
64 void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
65 void initializeAArch64BranchTargetsPass(PassRegistry&);
66 void initializeAArch64CollectLOHPass(PassRegistry&);
67 void initializeAArch64CondBrTuningPass(PassRegistry &);
68 void initializeAArch64CompressJumpTablesPass(PassRegistry&);
69 void initializeAArch64ConditionalComparesPass(PassRegistry&);
70 void initializeAArch64ConditionOptimizerPass(PassRegistry&);
71 void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry&);
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/external/llvm-project/llvm/lib/Target/X86/
DX86.h23 class PassRegistry; variable
145 void initializeEvexToVexInstPassPass(PassRegistry &);
146 void initializeFixupBWInstPassPass(PassRegistry &);
147 void initializeFixupLEAPassPass(PassRegistry &);
148 void initializeFPSPass(PassRegistry &);
149 void initializeWinEHStatePassPass(PassRegistry &);
150 void initializeX86AvoidSFBPassPass(PassRegistry &);
151 void initializeX86AvoidTrailingCallPassPass(PassRegistry &);
152 void initializeX86CallFrameOptimizationPass(PassRegistry &);
153 void initializeX86CmovConverterPassPass(PassRegistry &);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPC.h24 class PassRegistry; variable
59 void initializePPCCTRLoopsPass(PassRegistry&);
61 void initializePPCCTRLoopsVerifyPass(PassRegistry&);
63 void initializePPCLoopInstrFormPrepPass(PassRegistry&);
64 void initializePPCTOCRegDepsPass(PassRegistry&);
65 void initializePPCEarlyReturnPass(PassRegistry&);
66 void initializePPCVSXCopyPass(PassRegistry&);
67 void initializePPCVSXFMAMutatePass(PassRegistry&);
68 void initializePPCVSXSwapRemovalPass(PassRegistry&);
69 void initializePPCReduceCRLogicalsPass(PassRegistry&);
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/external/llvm-project/llvm/lib/Target/PowerPC/
DPPC.h26 class PassRegistry; variable
60 void initializePPCCTRLoopsPass(PassRegistry&);
62 void initializePPCCTRLoopsVerifyPass(PassRegistry&);
64 void initializePPCLoopInstrFormPrepPass(PassRegistry&);
65 void initializePPCTOCRegDepsPass(PassRegistry&);
66 void initializePPCEarlyReturnPass(PassRegistry&);
67 void initializePPCVSXCopyPass(PassRegistry&);
68 void initializePPCVSXFMAMutatePass(PassRegistry&);
69 void initializePPCVSXSwapRemovalPass(PassRegistry&);
70 void initializePPCReduceCRLogicalsPass(PassRegistry&);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86.h25 class PassRegistry; variable
138 void initializeEvexToVexInstPassPass(PassRegistry &);
139 void initializeFixupBWInstPassPass(PassRegistry &);
140 void initializeFixupLEAPassPass(PassRegistry &);
141 void initializeFPSPass(PassRegistry &);
142 void initializeWinEHStatePassPass(PassRegistry &);
143 void initializeX86AvoidSFBPassPass(PassRegistry &);
144 void initializeX86CallFrameOptimizationPass(PassRegistry &);
145 void initializeX86CmovConverterPassPass(PassRegistry &);
146 void initializeX86CondBrFoldingPassPass(PassRegistry &);
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/external/llvm-project/polly/include/polly/
DLinkAllPasses.h27 class PassRegistry; variable
107 class PassRegistry; variable
108 void initializeCodePreparationPass(llvm::PassRegistry &);
109 void initializeScopInlinerPass(llvm::PassRegistry &);
110 void initializeDeadCodeElimPass(llvm::PassRegistry &);
111 void initializeJSONExporterPass(llvm::PassRegistry &);
112 void initializeJSONImporterPass(llvm::PassRegistry &);
113 void initializeIslAstInfoWrapperPassPass(llvm::PassRegistry &);
114 void initializeCodeGenerationPass(llvm::PassRegistry &);
115 void initializeRewriteByrefParamsPass(llvm::PassRegistry &);
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/external/llvm-project/llvm/lib/Target/ARM/
DARM.h36 class PassRegistry; variable
62 void initializeARMParallelDSPPass(PassRegistry &);
63 void initializeARMLoadStoreOptPass(PassRegistry &);
64 void initializeARMPreAllocLoadStoreOptPass(PassRegistry &);
65 void initializeARMConstantIslandsPass(PassRegistry &);
66 void initializeARMExpandPseudoPass(PassRegistry &);
67 void initializeThumb2SizeReducePass(PassRegistry &);
68 void initializeThumb2ITBlockPass(PassRegistry &);
69 void initializeMVEVPTBlockPass(PassRegistry &);
70 void initializeMVEVPTOptimisationsPass(PassRegistry &);
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/external/llvm/lib/Target/AMDGPU/
DAMDGPU.h58 void initializeAMDGPUAnnotateKernelFeaturesPass(PassRegistry &);
61 void initializeSIFoldOperandsPass(PassRegistry &);
64 void initializeSIShrinkInstructionsPass(PassRegistry&);
67 void initializeSIFixSGPRCopiesPass(PassRegistry &);
70 void initializeSILowerI1CopiesPass(PassRegistry &);
73 void initializeSILoadStoreOptimizerPass(PassRegistry &);
76 void initializeSIWholeQuadModePass(PassRegistry &);
79 void initializeSILowerControlFlowPass(PassRegistry &);
85 void initializeAMDGPUPromoteAllocaPass(PassRegistry&);
95 void initializeSIFixControlFlowLiveIntervalsPass(PassRegistry&);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARM.h36 class PassRegistry; variable
61 void initializeARMParallelDSPPass(PassRegistry &);
62 void initializeARMLoadStoreOptPass(PassRegistry &);
63 void initializeARMPreAllocLoadStoreOptPass(PassRegistry &);
64 void initializeARMConstantIslandsPass(PassRegistry &);
65 void initializeARMExpandPseudoPass(PassRegistry &);
66 void initializeThumb2SizeReducePass(PassRegistry &);
67 void initializeThumb2ITBlockPass(PassRegistry &);
68 void initializeMVEVPTBlockPass(PassRegistry &);
69 void initializeARMLowOverheadLoopsPass(PassRegistry &);
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/external/llvm-project/llvm/lib/IR/
DPassRegistry.cpp30 static ManagedStatic<PassRegistry> PassRegistryObj;
31 PassRegistry *PassRegistry::getPassRegistry() { in getPassRegistry()
39 PassRegistry::~PassRegistry() = default;
41 const PassInfo *PassRegistry::getPassInfo(const void *TI) const { in getPassInfo()
47 const PassInfo *PassRegistry::getPassInfo(StringRef Arg) const { in getPassInfo()
57 void PassRegistry::registerPass(const PassInfo &PI, bool ShouldFree) { in registerPass()
73 void PassRegistry::enumerateWith(PassRegistrationListener *L) { in enumerateWith()
80 void PassRegistry::registerAnalysisGroup(const void *InterfaceID, in registerAnalysisGroup()
118 void PassRegistry::addRegistrationListener(PassRegistrationListener *L) { in addRegistrationListener()
123 void PassRegistry::removeRegistrationListener(PassRegistrationListener *L) { in removeRegistrationListener()
/external/llvm/lib/IR/
DPassRegistry.cpp26 static ManagedStatic<PassRegistry> PassRegistryObj;
27 PassRegistry *PassRegistry::getPassRegistry() { in getPassRegistry()
35 PassRegistry::~PassRegistry() {} in ~PassRegistry()
37 const PassInfo *PassRegistry::getPassInfo(const void *TI) const { in getPassInfo()
43 const PassInfo *PassRegistry::getPassInfo(StringRef Arg) const { in getPassInfo()
53 void PassRegistry::registerPass(const PassInfo &PI, bool ShouldFree) { in registerPass()
69 void PassRegistry::enumerateWith(PassRegistrationListener *L) { in enumerateWith()
76 void PassRegistry::registerAnalysisGroup(const void *InterfaceID, in registerAnalysisGroup()
116 void PassRegistry::addRegistrationListener(PassRegistrationListener *L) { in addRegistrationListener()
121 void PassRegistry::removeRegistrationListener(PassRegistrationListener *L) { in removeRegistrationListener()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DPassRegistry.cpp30 static ManagedStatic<PassRegistry> PassRegistryObj;
31 PassRegistry *PassRegistry::getPassRegistry() { in getPassRegistry()
39 PassRegistry::~PassRegistry() = default;
41 const PassInfo *PassRegistry::getPassInfo(const void *TI) const { in getPassInfo()
47 const PassInfo *PassRegistry::getPassInfo(StringRef Arg) const { in getPassInfo()
57 void PassRegistry::registerPass(const PassInfo &PI, bool ShouldFree) { in registerPass()
73 void PassRegistry::enumerateWith(PassRegistrationListener *L) { in enumerateWith()
80 void PassRegistry::registerAnalysisGroup(const void *InterfaceID, in registerAnalysisGroup()
118 void PassRegistry::addRegistrationListener(PassRegistrationListener *L) { in addRegistrationListener()
123 void PassRegistry::removeRegistrationListener(PassRegistrationListener *L) { in removeRegistrationListener()
/external/llvm-project/llvm/lib/Target/BPF/
DBPF.h31 void initializeBPFAdjustOptPass(PassRegistry&);
32 void initializeBPFCheckAndAdjustIRPass(PassRegistry&);
34 void initializeBPFAbstractMemberAccessLegacyPassPass(PassRegistry &);
35 void initializeBPFPreserveDITypePass(PassRegistry&);
36 void initializeBPFMISimplifyPatchablePass(PassRegistry&);
37 void initializeBPFMIPeepholePass(PassRegistry&);
38 void initializeBPFMIPeepholeTruncElimPass(PassRegistry&);
39 void initializeBPFMIPreEmitPeepholePass(PassRegistry&);
40 void initializeBPFMIPreEmitCheckingPass(PassRegistry&);
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPF.h27 void initializeBPFAbstractMemberAccessPass(PassRegistry&);
28 void initializeBPFMISimplifyPatchablePass(PassRegistry&);
29 void initializeBPFMIPeepholePass(PassRegistry&);
30 void initializeBPFMIPeepholeTruncElimPass(PassRegistry&);
31 void initializeBPFMIPreEmitPeepholePass(PassRegistry&);
32 void initializeBPFMIPreEmitCheckingPass(PassRegistry&);
/external/llvm/lib/Target/NVPTX/
DNVPTXTargetMachine.cpp58 void initializeNVVMIntrRangePass(PassRegistry&);
59 void initializeNVVMReflectPass(PassRegistry&);
60 void initializeGenericToNVVMPass(PassRegistry&);
61 void initializeNVPTXAllocaHoistingPass(PassRegistry &);
62 void initializeNVPTXAssignValidGlobalNamesPass(PassRegistry&);
63 void initializeNVPTXFavorNonGenericAddrSpacesPass(PassRegistry &);
64 void initializeNVPTXInferAddressSpacesPass(PassRegistry &);
65 void initializeNVPTXLowerAggrCopiesPass(PassRegistry &);
66 void initializeNVPTXLowerKernelArgsPass(PassRegistry &);
67 void initializeNVPTXLowerAllocaPass(PassRegistry &);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonTargetMachine.cpp128 void initializeHexagonBitSimplifyPass(PassRegistry&);
129 void initializeHexagonConstExtendersPass(PassRegistry&);
130 void initializeHexagonConstPropagationPass(PassRegistry&);
131 void initializeHexagonEarlyIfConversionPass(PassRegistry&);
132 void initializeHexagonExpandCondsetsPass(PassRegistry&);
133 void initializeHexagonGenMuxPass(PassRegistry&);
134 void initializeHexagonHardwareLoopsPass(PassRegistry&);
135 void initializeHexagonLoopIdiomRecognizePass(PassRegistry&);
136 void initializeHexagonVectorLoopCarriedReusePass(PassRegistry&);
137 void initializeHexagonNewValueJumpPass(PassRegistry&);
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/external/llvm-project/llvm/lib/Target/Mips/
DMips.h28 class PassRegistry; variable
46 void initializeMipsDelaySlotFillerPass(PassRegistry &);
47 void initializeMipsBranchExpansionPass(PassRegistry &);
48 void initializeMicroMipsSizeReducePass(PassRegistry &);
49 void initializeMipsPreLegalizerCombinerPass(PassRegistry&);

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