| /external/libxaac/decoder/ |
| D | ixheaacd_constants.h | 42 #define Q19 524288 macro
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 88 case AArch64::Q19: in isOdd()
|
| D | AArch64SchedPredicates.td | 189 CheckRegOperand<0, Q19>,
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| D | AArch64RegisterInfo.td | 407 def Q19 : AArch64Reg<19, "q19", [D19], ["v19", ""]>, DwarfRegAlias<B19>;
768 def Z19 : AArch64Reg<19, "z19", [Q19, Z19_HI]>, DwarfRegNum<[115]>;
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 88 case AArch64::Q19: in isOdd()
|
| D | AArch64SchedPredicates.td | 189 CheckRegOperand<0, Q19>,
|
| D | AArch64RegisterInfo.td | 410 def Q19 : AArch64Reg<19, "q19", [D19], ["v19", ""]>, DwarfRegAlias<B19>;
788 def Z19 : AArch64Reg<19, "z19", [Q19, Z19_HI]>, DwarfRegNum<[115]>;
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 89 case AArch64::Q19: in isOdd()
|
| D | AArch64RegisterInfo.td | 374 def Q19 : AArch64Reg<19, "q19", [D19], ["v19", ""]>, DwarfRegAlias<B19>;
|
| /external/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCTargetDesc.cpp | 218 {codeview::RegisterId::ARM64_Q19, AArch64::Q19}, in initLLVMToCVRegMapping()
|
| D | AArch64InstPrinter.cpp | 1197 case AArch64::Q18: Reg = AArch64::Q19; break; in getNextVectorRegister()
1198 case AArch64::Q19: Reg = AArch64::Q20; break; in getNextVectorRegister()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCTargetDesc.cpp | 214 {codeview::RegisterId::ARM64_Q19, AArch64::Q19}, in initLLVMToCVRegMapping()
|
| D | AArch64InstPrinter.cpp | 1183 case AArch64::Q18: Reg = AArch64::Q19; break; in getNextVectorRegister()
1184 case AArch64::Q19: Reg = AArch64::Q20; break; in getNextVectorRegister()
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1246 case AArch64::Q18: Reg = AArch64::Q19; break; in getNextVectorRegister()
1247 case AArch64::Q19: Reg = AArch64::Q20; break; in getNextVectorRegister()
|
| /external/llvm-project/llvm/lib/Target/VE/Disassembler/ |
| D | VEDisassembler.cpp | 95 VE::Q16, VE::Q17, VE::Q18, VE::Q19, VE::Q20, VE::Q21, VE::Q22, VE::Q23,
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 259 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
439 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 308 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
632 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
|
| /external/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 311 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
635 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
|
| /external/llvm-project/llvm/lib/Target/VE/AsmParser/ |
| D | VEAsmParser.cpp | 125 VE::Q16, VE::Q17, VE::Q18, VE::Q19, VE::Q20, VE::Q21, VE::Q22, VE::Q23,
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 160 Q19 = 140,
2660 …h64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArc…
3921 { AArch64::Q19, 83U },
4200 { AArch64::Q19, 83U },
20418 …h64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArc…
20420 …h64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArc…
20422 …h64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArc…
20424 …h64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArc…
20446 …h64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArc…
20448 …h64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArc…
[all …]
|
| D | AArch64GenSubtargetInfo.inc | 14034 || MI->getOperand(0).getReg() == AArch64::Q19
14188 || MI->getOperand(0).getReg() == AArch64::Q19
14342 || MI->getOperand(0).getReg() == AArch64::Q19
14553 || MI->getOperand(0).getReg() == AArch64::Q19
14594 || MI->getOperand(0).getReg() == AArch64::Q19
16563 || MI->getOperand(0).getReg() == AArch64::Q19
16604 || MI->getOperand(0).getReg() == AArch64::Q19
19670 || MI->getOperand(0).getReg() == AArch64::Q19
19824 || MI->getOperand(0).getReg() == AArch64::Q19
19978 || MI->getOperand(0).getReg() == AArch64::Q19
[all …]
|
| D | AArch64GenAsmMatcher.inc | 11444 case AArch64::Q19: OpKind = MCK_FPR128; break;
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1876 .Case("v19", AArch64::Q19) in matchVectorRegName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 2109 .Case("v19", AArch64::Q19) in MatchNeonVectorRegName()
|
| /external/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 2154 .Case("v19", AArch64::Q19) in MatchNeonVectorRegName()
|